#include "ELL_TYPE.h"

STC8Hx_REG.h 的引用(Include)关系图:

此图展示该文件直接或间接的被哪些文件引用了:

结构体
struct	SYSCLK_TypeDef

struct	MDU16_TypeDef

宏定义
#define	AUXR_ADDRESS 0x8EU

#define	AUXR2_ADDRESS 0x8FU

#define	PER_SW1_ADDRESS 0xA2U

#define	PER_SW2_ADDRESS 0xBAU

#define	EAXFR_ENABLE() P_SW2 \|= 0x80

#define	EAXFR_DISABLE() P_SW2 &= 0x7F

#define	IRCBAND_ADDRESS 0x9DU

#define	LIRTRIM_ADDRESS 0x9EU

#define	IRTRIM_ADDRESS 0x9FU

#define	SYSCLK_BASE 0xFE00U

#define	CKSEL_ADDRESS (SYSCLK_BASE + 0x0000U)

#define	CLKDIV_ADDRESS (SYSCLK_BASE + 0x0001U)

#define	HIRCCR_ADDRESS (SYSCLK_BASE + 0x0002U)

#define	XOSCCR_ADDRESS (SYSCLK_BASE + 0x0003U)

#define	IRC32KCR_ADDRESS (SYSCLK_BASE + 0x0004U)

#define	MCLKOCR_ADDRESS (SYSCLK_BASE + 0x0005U)

#define	X32KCR_ADDRESS (SYSCLK_BASE + 0x0006U)

#define	SYSCLK (* (SYSCLK_TypeDef xdata *) SYSCLK_BASE)

#define	CKSEL ( (__IO uint8_t xdata ) CKSEL_ADDRESS)

#define	CLKDIV ( (__IO uint8_t xdata ) CLKDIV_ADDRESS)

#define	IRC24MCR ( (__IO uint8_t xdata ) HIRCCR_ADDRESS)

#define	XOSCCR ( (__IO uint8_t xdata ) XOSCCR_ADDRESS)

#define	IRC32KCR ( (__IO uint8_t xdata ) IRC32KCR_ADDRESS)

#define	MCLKOCR ( (__IO uint8_t xdata ) MCLKOCR_ADDRESS)

#define	X32KCR ( (__IO uint8_t xdata ) X32KCR_ADDRESS)

#define	IRC_22_1184M ((__I uint8_t idata )0xFA)

#define	IRC_24M ((__I uint8_t idata )0xFB)

#define	PCON_ADDRESS 0x87U

#define	VOCTRL_ADDRESS 0xBBU

#define	IE_ADDRESS 0xA8U

#define	IE2_ADDRESS 0xAFU

#define	IP_ADDRESS 0xB8U

#define	IPH_ADDRESS 0xB7U

#define	IP2_ADDRESS 0xB5U

#define	IP2H_ADDRESS 0xB6U

#define	IP3_ADDRESS 0xDFU

#define	IP3H_ADDRESS 0xEEU

#define	INTCLKO_ADDRESS 0x8FU

#define	AUXINTIF_ADDRESS 0xEFU

#define	INTE_GPIO_ADDRESS 0xFD00U

#define	INTF_GPIO_ADDRESS 0xFD10U

#define	P0INTE_ADDRESS INTE_GPIO_ADDRESS

#define	P1INTE_ADDRESS (INTE_GPIO_ADDRESS + 0x0001U)

#define	P2INTE_ADDRESS (INTE_GPIO_ADDRESS + 0x0002U)

#define	P3INTE_ADDRESS (INTE_GPIO_ADDRESS + 0x0003U)

#define	P4INTE_ADDRESS (INTE_GPIO_ADDRESS + 0x0004U)

#define	P5INTE_ADDRESS (INTE_GPIO_ADDRESS + 0x0005U)

#define	P6INTE_ADDRESS (INTE_GPIO_ADDRESS + 0x0006U)

#define	P7INTE_ADDRESS (INTE_GPIO_ADDRESS + 0x0007U)

#define	P0INTF_ADDRESS INTF_GPIO_ADDRESS

#define	P1INTF_ADDRESS (INTF_GPIO_ADDRESS + 0x0001U)

#define	P2INTF_ADDRESS (INTF_GPIO_ADDRESS + 0x0002U)

#define	P3INTF_ADDRESS (INTF_GPIO_ADDRESS + 0x0003U)

#define	P4INTF_ADDRESS (INTF_GPIO_ADDRESS + 0x0004U)

#define	P5INTF_ADDRESS (INTF_GPIO_ADDRESS + 0x0005U)

#define	P6INTF_ADDRESS (INTF_GPIO_ADDRESS + 0x0006U)

#define	P7INTF_ADDRESS (INTF_GPIO_ADDRESS + 0x0007U)

#define	P0INTE ( (__IO uint8_t xdata ) P0INTE_ADDRESS)

#define	P1INTE ( (__IO uint8_t xdata ) P1INTE_ADDRESS)

#define	P2INTE ( (__IO uint8_t xdata ) P2INTE_ADDRESS)

#define	P3INTE ( (__IO uint8_t xdata ) P3INTE_ADDRESS)

#define	P4INTE ( (__IO uint8_t xdata ) P4INTE_ADDRESS)

#define	P5INTE ( (__IO uint8_t xdata ) P5INTE_ADDRESS)

#define	P0INTF ( (__IO uint8_t xdata ) P0INTF_ADDRESS)

#define	P1INTF ( (__IO uint8_t xdata ) P1INTF_ADDRESS)

#define	P2INTF ( (__IO uint8_t xdata ) P2INTF_ADDRESS)

#define	P3INTF ( (__IO uint8_t xdata ) P3INTF_ADDRESS)

#define	P4INTF ( (__IO uint8_t xdata ) P4INTF_ADDRESS)

#define	P5INTF ( (__IO uint8_t xdata ) P5INTF_ADDRESS)

#define	GPIO_BASE 0x80U

#define	PxM1_BASE 0x93U

#define	PxM0_BASE 0x94U

#define	BUS_SPEED_ADDRESS 0xA1U

#define	PxPU_BASE 0xFE10U

#define	PxNCS_BASE 0xFE18U

#define	PxSR_BASE 0xFE20U

#define	PxDR_BASE 0xFE28U

#define	PxIE_BASE 0xFE30U

#define	P0_ADDRESS GPIO_BASE

#define	P1_ADDRESS 0x90U

#define	P2_ADDRESS 0xA0U

#define	P3_ADDRESS 0xB0U

#define	P4_ADDRESS 0xC0U

#define	P5_ADDRESS 0xC8U

#define	P6_ADDRESS 0xE8U

#define	P7_ADDRESS 0xF8U

#define	P0M1_ADDRESS PxM1_BASE

#define	P1M1_ADDRESS 0x91U

#define	P2M1_ADDRESS 0x95U

#define	P3M1_ADDRESS 0xB1U

#define	P4M1_ADDRESS 0xB3U

#define	P5M1_ADDRESS 0xC9U

#define	P6M1_ADDRESS 0xCBU

#define	P7M1_ADDRESS 0xE1U

#define	P0M0_ADDRESS PxM0_BASE

#define	P1M0_ADDRESS 0x92U

#define	P2M0_ADDRESS 0x96U

#define	P3M0_ADDRESS 0xB2U

#define	P4M0_ADDRESS 0xB4U

#define	P5M0_ADDRESS 0xCAU

#define	P6M0_ADDRESS 0xCCU

#define	P7M0_ADDRESS 0xE2U

#define	P0PU_ADDRESS (PxPU_BASE + 0x00U)

#define	P1PU_ADDRESS (PxPU_BASE + 0x01U)

#define	P2PU_ADDRESS (PxPU_BASE + 0x02U)

#define	P3PU_ADDRESS (PxPU_BASE + 0x03U)

#define	P4PU_ADDRESS (PxPU_BASE + 0x04U)

#define	P5PU_ADDRESS (PxPU_BASE + 0x05U)

#define	P6PU_ADDRESS (PxPU_BASE + 0x06U)

#define	P7PU_ADDRESS (PxPU_BASE + 0x07U)

#define	P0NCS_ADDRESS (PxNCS_BASE + 0x00U)

#define	P1NCS_ADDRESS (PxNCS_BASE + 0x01U)

#define	P2NCS_ADDRESS (PxNCS_BASE + 0x02U)

#define	P3NCS_ADDRESS (PxNCS_BASE + 0x03U)

#define	P4NCS_ADDRESS (PxNCS_BASE + 0x04U)

#define	P5NCS_ADDRESS (PxNCS_BASE + 0x05U)

#define	P6NCS_ADDRESS (PxNCS_BASE + 0x06U)

#define	P7NCS_ADDRESS (PxNCS_BASE + 0x07U)

#define	P0SR_ADDRESS (PxSR_BASE + 0x00U)

#define	P1SR_ADDRESS (PxSR_BASE + 0x01U)

#define	P2SR_ADDRESS (PxSR_BASE + 0x02U)

#define	P3SR_ADDRESS (PxSR_BASE + 0x03U)

#define	P4SR_ADDRESS (PxSR_BASE + 0x04U)

#define	P5SR_ADDRESS (PxSR_BASE + 0x05U)

#define	P6SR_ADDRESS (PxSR_BASE + 0x06U)

#define	P7SR_ADDRESS (PxSR_BASE + 0x07U)

#define	P0DR_ADDRESS (PxDR_BASE + 0x00U)

#define	P1DR_ADDRESS (PxDR_BASE + 0x01U)

#define	P2DR_ADDRESS (PxDR_BASE + 0x02U)

#define	P3DR_ADDRESS (PxDR_BASE + 0x03U)

#define	P4DR_ADDRESS (PxDR_BASE + 0x04U)

#define	P5DR_ADDRESS (PxDR_BASE + 0x05U)

#define	P6DR_ADDRESS (PxDR_BASE + 0x06U)

#define	P7DR_ADDRESS (PxDR_BASE + 0x07U)

#define	P0IE_ADDRESS (PxIE_BASE + 0x00U)

#define	P1IE_ADDRESS (PxIE_BASE + 0x01U)

#define	P3IE_ADDRESS (PxIE_BASE + 0x03U)

#define	P0PU ( (__IO uint8_t xdata ) P0PU_ADDRESS)

#define	P1PU ( (__IO uint8_t xdata ) P1PU_ADDRESS)

#define	P2PU ( (__IO uint8_t xdata ) P2PU_ADDRESS)

#define	P3PU ( (__IO uint8_t xdata ) P3PU_ADDRESS)

#define	P4PU ( (__IO uint8_t xdata ) P4PU_ADDRESS)

#define	P5PU ( (__IO uint8_t xdata ) P5PU_ADDRESS)

#define	P6PU ( (__IO uint8_t xdata ) P6PU_ADDRESS)

#define	P7PU ( (__IO uint8_t xdata ) P7PU_ADDRESS)

#define	P0SR ( (__IO uint8_t xdata ) P0SR_ADDRESS)

#define	P1SR ( (__IO uint8_t xdata ) P1SR_ADDRESS)

#define	P2SR ( (__IO uint8_t xdata ) P2SR_ADDRESS)

#define	P3SR ( (__IO uint8_t xdata ) P3SR_ADDRESS)

#define	P4SR ( (__IO uint8_t xdata ) P4SR_ADDRESS)

#define	P5SR ( (__IO uint8_t xdata ) P5SR_ADDRESS)

#define	P6SR ( (__IO uint8_t xdata ) P6SR_ADDRESS)

#define	P7SR ( (__IO uint8_t xdata ) P7SR_ADDRESS)

#define	P0DR ( (__IO uint8_t xdata ) P0DR_ADDRESS)

#define	P1DR ( (__IO uint8_t xdata ) P1DR_ADDRESS)

#define	P2DR ( (__IO uint8_t xdata ) P2DR_ADDRESS)

#define	P3DR ( (__IO uint8_t xdata ) P3DR_ADDRESS)

#define	P4DR ( (__IO uint8_t xdata ) P4DR_ADDRESS)

#define	P5DR ( (__IO uint8_t xdata ) P5DR_ADDRESS)

#define	P6DR ( (__IO uint8_t xdata ) P6DR_ADDRESS)

#define	P7DR ( (__IO uint8_t xdata ) P7DR_ADDRESS)

#define	P0IE ( (__IO uint8_t xdata ) P0IE_ADDRESS)

#define	P1IE ( (__IO uint8_t xdata ) P1IE_ADDRESS)

#define	P3IE ( (__IO uint8_t xdata ) P3IE_ADDRESS)

#define	P0NCS ( (__IO uint8_t xdata ) P0NCS_ADDRESS)

#define	P1NCS ( (__IO uint8_t xdata ) P1NCS_ADDRESS)

#define	P2NCS ( (__IO uint8_t xdata ) P2NCS_ADDRESS)

#define	P3NCS ( (__IO uint8_t xdata ) P3NCS_ADDRESS)

#define	P4NCS ( (__IO uint8_t xdata ) P4NCS_ADDRESS)

#define	P5NCS ( (__IO uint8_t xdata ) P5NCS_ADDRESS)

#define	P6NCS ( (__IO uint8_t xdata ) P6NCS_ADDRESS)

#define	P7NCS ( (__IO uint8_t xdata ) P7NCS_ADDRESS)

#define	GPIO_Px(x) (P##x)

#define	Px_M1(x) (P##x##M1)

#define	Px_M0(x) (P##x##M0)

#define	Px_PU(x) (P##x##PU)

#define	Px_SR(x) (P##x##SR)

#define	Px_DR(x) (P##x##DR)

#define	Px_IE(x) (P##x##IE)

#define	Px_NCS(x) (P##x##NCS)

#define	WDT_ADDRESS 0xC1U

#define	RSTCFG_ADDRESS 0xFFU

#define	TCON_ADDRESS 0x88U

#define	TMOD_ADDRESS 0x89U

#define	T0L_ADDRESS 0x8AU

#define	T1L_ADDRESS 0x8BU

#define	T0H_ADDRESS 0x8CU

#define	T1H_ADDRESS 0x8DU

#define	T4T3M_ADDRESS 0xD1U

#define	T4H_ADDRESS 0xD2U

#define	T4L_ADDRESS 0xD3U

#define	T3H_ADDRESS 0xD4U

#define	T3L_ADDRESS 0xD5U

#define	T2H_ADDRESS 0xD6U

#define	T2L_ADDRESS 0xD7U

#define	WKTCL_ADDRESS 0xAAU

#define	WKTCH_ADDRESS 0xABU

#define	TM2PS_ADDRESS 0xFEA2U

#define	TM3PS_ADDRESS 0xFEA3U

#define	TM4PS_ADDRESS 0xFEA4U

#define	T1_GATE 0x80

#define	T1_CT 0x40

#define	T1_M1 0x20

#define	T1_M0 0x10

#define	T0_GATE 0x08

#define	T0_CT 0x04

#define	T0_M1 0x02

#define	T0_M0 0x01

#define	T4R 0x80

#define	T4_CT 0x40

#define	T4x12 0x20

#define	T4CLKO 0x10

#define	T3R 0x08

#define	T3_CT 0x04

#define	T3x12 0x02

#define	T3CLKO 0x01

#define	WKTEN 0x80

#define	WDT_FLAG 0x80

#define	EN_WDT 0x20

#define	CLR_WDT 0x10

#define	IDL_WDT 0x08

#define	TM2PS ((__IO uint8_t xdata )TM2PS_ADDRESS)

#define	TM3PS ((__IO uint8_t xdata )TM3PS_ADDRESS)

#define	TM4PS ((__IO uint8_t xdata )TM4PS_ADDRESS)

#define	FWTH ((__I uint8_t idata )0xF8)

#define	FWTL ((__I uint8_t idata )0xF9)

#define	SCON_ADDRESS 0x98U

#define	SBUF_ADDRESS 0x99U

#define	S2CON_ADDRESS 0x9AU

#define	S2BUF_ADDRESS 0x9BU

#define	S3CON_ADDRESS 0xACU

#define	S3BUF_ADDRESS 0xADU

#define	S4CON_ADDRESS 0x84U

#define	S4BUF_ADDRESS 0x85U

#define	SADDR_ADDRESS 0xA9U

#define	SADEN_ADDRESS 0xB9U

#define	S2SM0 0x80

#define	S2ST4 0x40

#define	S2SM2 0x20

#define	S2REN 0x10

#define	S2TB8 0x08

#define	S2RB8 0x04

#define	S2TI 0x02

#define	S2RI 0x01

#define	S3SM0 0x80

#define	S3ST4 0x40

#define	S3SM2 0x20

#define	S3REN 0x10

#define	S3TB8 0x08

#define	S3RB8 0x04

#define	S3TI 0x02

#define	S3RI 0x01

#define	S4SM0 0x80

#define	S4ST4 0x40

#define	S4SM2 0x20

#define	S4REN 0x10

#define	S4TB8 0x08

#define	S4RB8 0x04

#define	S4TI 0x02

#define	S4RI 0x01

#define	CMPCR1_ADDRESS 0xE6U

#define	CMPCR2_ADDRESS 0xE7U

#define	CMPEN 0x80

#define	CMPIF 0x40

#define	PIE 0x20

#define	NIE 0x10

#define	PIS 0x08

#define	NIS 0x04

#define	CMPOE 0x02

#define	CMPRES 0x01

#define	INVCMPO 0x80

#define	DISFLT 0x40

#define	ADC_CONTR_ADDRESS 0xBCU

#define	ADC_RES_ADDRESS 0xBDU

#define	ADC_RESH_ADDRESS 0xBDU

#define	ADC_RESL_ADDRESS 0xBEU

#define	ADCCFG_ADDRESS 0xDEU

#define	ADCTIM_ADDRESS 0xFEA8U

#define	ADC_POWER 0x80

#define	ADC_START 0x40

#define	ADC_FLAG 0x20

#define	ADC_RESFMT 0x20

#define	ADCTIM ((__IO uint8_t xdata )ADCTIM_ADDRESS)

#define	IAP_DATA_ADDRESS 0xC2U

#define	IAP_ADDRH_ADDRESS 0xC3U

#define	IAP_ADDRL_ADDRESS 0xC4U

#define	IAP_CMD_ADDRESS 0xC5U

#define	IAP_TRIG_ADDRESS 0xC6U

#define	IAP_CONTR_ADDRESS 0xC7U

#define	IAP_TPS_ADDRESS 0xF5U

#define	ISP_DATA_ADDRESS 0xC2U

#define	ISP_ADDRH_ADDRESS 0xC3U

#define	ISP_ADDRL_ADDRESS 0xC4U

#define	ISP_CMD_ADDRESS 0xC5U

#define	ISP_TRIG_ADDRESS 0xC6U

#define	ISP_CONTR_ADDRESS 0xC7U

#define	IAP_IDL 0x00

#define	IAP_READ 0x01

#define	IAP_WRITE 0x02

#define	IAP_ERASE 0x03

#define	IAPEN 0x80

#define	SWBS 0x40

#define	SWRST 0x20

#define	CMD_FAIL 0x10

#define	PWMCFG_ADDRESS 0xF1U

#define	PWMIF_ADDRESS 0xF6U

#define	PWMFDCR_ADDRESS 0xF7U

#define	PWMCR_ADDRESS 0xFEU

#define	PWM_BASE1 0xFFF0U

#define	PWM0_BASE 0xFF00U

#define	PWM1_BASE 0xFF10U

#define	PWM2_BASE 0xFF20U

#define	PWM3_BASE 0xFF30U

#define	PWM4_BASE 0xFF40U

#define	PWM5_BASE 0xFF50U

#define	PWM6_BASE 0xFF60U

#define	PWM7_BASE 0xFF70U

#define	PWMC_ADDRESS (PWM_BASE1 + 0x00U)

#define	PWMCH_ADDRESS (PWMC_ADDRESS + 0x00U)

#define	PWMCL_ADDRESS (PWMCH_ADDRESS + 0x01U)

#define	PWMCKS_ADDRESS (PWMCL_ADDRESS + 0x01U)

#define	TADCP_ADDRESS (PWMCKS_ADDRESS + 0x01U)

#define	TADCPH_ADDRESS (TADCP_ADDRESS + 0x00U)

#define	TADCPL_ADDRESS (PWMCL_ADDRESS + 0x01U)

#define	PWM0T1_ADDRESS (PWM0_BASE + 0x00U)

#define	PWM0T1H_ADDRESS (PWM0T1_ADDRESS + 0x00U)

#define	PWM0T1L_ADDRESS (PWM0T1H_ADDRESS + 0x01U)

#define	PWM0T2_ADDRESS (PWM0T1L_ADDRESS + 0x01U)

#define	PWM0T2H_ADDRESS (PWM0T2_ADDRESS + 0x00U)

#define	PWM0T2L_ADDRESS (PWM0T2H_ADDRESS + 0x01U)

#define	PWM0CR_ADDRESS (PWM0T2L_ADDRESS + 0x01U)

#define	PWM0HLD_ADDRESS (PWM0CR_ADDRESS + 0x01U)

#define	PWM1T1_ADDRESS (PWM1_BASE + 0x00U)

#define	PWM1T1H_ADDRESS (PWM1T1_ADDRESS + 0x00U)

#define	PWM1T1L_ADDRESS (PWM1T1H_ADDRESS + 0x01U)

#define	PWM1T2_ADDRESS (PWM1T1L_ADDRESS + 0x01U)

#define	PWM1T2H_ADDRESS (PWM1T2_ADDRESS + 0x00U)

#define	PWM1T2L_ADDRESS (PWM1T2H_ADDRESS + 0x01U)

#define	PWM1CR_ADDRESS (PWM1T2L_ADDRESS + 0x01U)

#define	PWM1HLD_ADDRESS (PWM1CR_ADDRESS + 0x01U)

#define	PWM2T1_ADDRESS (PWM2_BASE + 0x00U)

#define	PWM2T1H_ADDRESS (PWM2T1_ADDRESS + 0x00U)

#define	PWM2T1L_ADDRESS (PWM2T1H_ADDRESS + 0x01U)

#define	PWM2T2_ADDRESS (PWM2T1L_ADDRESS + 0x01U)

#define	PWM2T2H_ADDRESS (PWM2T2_ADDRESS + 0x00U)

#define	PWM2T2L_ADDRESS (PWM2T2H_ADDRESS + 0x01U)

#define	PWM2CR_ADDRESS (PWM2T2L_ADDRESS + 0x01U)

#define	PWM2HLD_ADDRESS (PWM2CR_ADDRESS + 0x01U)

#define	PWM3T1_ADDRESS (PWM3_BASE + 0x00U)

#define	PWM3T1H_ADDRESS (PWM3T1_ADDRESS + 0x00U)

#define	PWM3T1L_ADDRESS (PWM3T1H_ADDRESS + 0x01U)

#define	PWM3T2_ADDRESS (PWM3T1L_ADDRESS + 0x01U)

#define	PWM3T2H_ADDRESS (PWM3T2_ADDRESS + 0x00U)

#define	PWM3T2L_ADDRESS (PWM3T2H_ADDRESS + 0x01U)

#define	PWM3CR_ADDRESS (PWM3T2L_ADDRESS + 0x01U)

#define	PWM3HLD_ADDRESS (PWM3CR_ADDRESS + 0x01U)

#define	PWM4T1_ADDRESS (PWM4_BASE + 0x00U)

#define	PWM4T1H_ADDRESS (PWM4T1_ADDRESS + 0x00U)

#define	PWM4T1L_ADDRESS (PWM4T1H_ADDRESS + 0x01U)

#define	PWM4T2_ADDRESS (PWM4T1L_ADDRESS + 0x01U)

#define	PWM4T2H_ADDRESS (PWM4T2_ADDRESS + 0x00U)

#define	PWM4T2L_ADDRESS (PWM4T2H_ADDRESS + 0x01U)

#define	PWM4CR_ADDRESS (PWM4T2L_ADDRESS + 0x01U)

#define	PWM4HLD_ADDRESS (PWM4CR_ADDRESS + 0x01U)

#define	PWM5T1_ADDRESS (PWM5_BASE + 0x00U)

#define	PWM5T1H_ADDRESS (PWM5T1_ADDRESS + 0x00U)

#define	PWM5T1L_ADDRESS (PWM5T1H_ADDRESS + 0x01U)

#define	PWM5T2_ADDRESS (PWM5T1L_ADDRESS + 0x01U)

#define	PWM5T2H_ADDRESS (PWM5T2_ADDRESS + 0x00U)

#define	PWM5T2L_ADDRESS (PWM5T2H_ADDRESS + 0x01U)

#define	PWM5CR_ADDRESS (PWM5T2L_ADDRESS + 0x01U)

#define	PWM5HLD_ADDRESS (PWM5CR_ADDRESS + 0x01U)

#define	PWM6T1_ADDRESS (PWM6_BASE + 0x00U)

#define	PWM6T1H_ADDRESS (PWM6T1_ADDRESS + 0x00U)

#define	PWM6T1L_ADDRESS (PWM6T1H_ADDRESS + 0x01U)

#define	PWM6T2_ADDRESS (PWM6T1L_ADDRESS + 0x01U)

#define	PWM6T2H_ADDRESS (PWM6T2_ADDRESS + 0x00U)

#define	PWM6T2L_ADDRESS (PWM6T2H_ADDRESS + 0x01U)

#define	PWM6CR_ADDRESS (PWM6T2L_ADDRESS + 0x01U)

#define	PWM6HLD_ADDRESS (PWM6CR_ADDRESS + 0x01U)

#define	PWM7T1_ADDRESS (PWM7_BASE + 0x00U)

#define	PWM7T1H_ADDRESS (PWM7T1_ADDRESS + 0x00U)

#define	PWM7T1L_ADDRESS (PWM7T1H_ADDRESS + 0x01U)

#define	PWM7T2_ADDRESS (PWM7T1L_ADDRESS + 0x01U)

#define	PWM7T2H_ADDRESS (PWM7T2_ADDRESS + 0x00U)

#define	PWM7T2L_ADDRESS (PWM7T2H_ADDRESS + 0x01U)

#define	PWM7CR_ADDRESS (PWM7T2L_ADDRESS + 0x01U)

#define	PWM7HLD_ADDRESS (PWM7CR_ADDRESS + 0x01U)

#define	PWM1_ETRPS ((unsigned char volatile xdata )0xfeb0)

#define	PWM1_ENO ((unsigned char volatile xdata )0xfeb1)

#define	PWM1_PS ((unsigned char volatile xdata )0xfeb2)

#define	PWM1_IOAUX ((unsigned char volatile xdata )0xfeb3)

#define	PWM2_ETRPS ((unsigned char volatile xdata )0xfeb4)

#define	PWM2_ENO ((unsigned char volatile xdata )0xfeb5)

#define	PWM2_PS ((unsigned char volatile xdata )0xfeb6)

#define	PWM2_IOAUX ((unsigned char volatile xdata )0xfeb7)

#define	PWM1_CR1 ((unsigned char volatile xdata )0xfec0)

#define	PWM1_CR2 ((unsigned char volatile xdata )0xfec1)

#define	PWM1_SMCR ((unsigned char volatile xdata )0xfec2)

#define	PWM1_ETR ((unsigned char volatile xdata )0xfec3)

#define	PWM1_IER ((unsigned char volatile xdata )0xfec4)

#define	PWM1_SR1 ((unsigned char volatile xdata )0xfec5)

#define	PWM1_SR2 ((unsigned char volatile xdata )0xfec6)

#define	PWM1_EGR ((unsigned char volatile xdata )0xfec7)

#define	PWM1_CCMR1 ((unsigned char volatile xdata )0xfec8)

#define	PWM1_CCMR2 ((unsigned char volatile xdata )0xfec9)

#define	PWM1_CCMR3 ((unsigned char volatile xdata )0xfeca)

#define	PWM1_CCMR4 ((unsigned char volatile xdata )0xfecb)

#define	PWM1_CCER1 ((unsigned char volatile xdata )0xfecc)

#define	PWM1_CCER2 ((unsigned char volatile xdata )0xfecd)

#define	PWM1_CNTR ((unsigned int volatile xdata )0xfece)

#define	PWM1_CNTRH ((unsigned char volatile xdata )0xfece)

#define	PWM1_CNTRL ((unsigned char volatile xdata )0xfecf)

#define	PWM1_PSCR ((unsigned int volatile xdata )0xfed0)

#define	PWM1_PSCRH ((unsigned char volatile xdata )0xfed0)

#define	PWM1_PSCRL ((unsigned char volatile xdata )0xfed1)

#define	PWM1_ARR ((unsigned int volatile xdata )0xfed2)

#define	PWM1_ARRH ((unsigned char volatile xdata )0xfed2)

#define	PWM1_ARRL ((unsigned char volatile xdata )0xfed3)

#define	PWM1_RCR ((unsigned char volatile xdata )0xfed4)

#define	PWM1_CCR1 ((unsigned int volatile xdata )0xfed5)

#define	PWM1_CCR1H ((unsigned char volatile xdata )0xfed5)

#define	PWM1_CCR1L ((unsigned char volatile xdata )0xfed6)

#define	PWM1_CCR2 ((unsigned int volatile xdata )0xfed7)

#define	PWM1_CCR2H ((unsigned char volatile xdata )0xfed7)

#define	PWM1_CCR2L ((unsigned char volatile xdata )0xfed8)

#define	PWM1_CCR3 ((unsigned int volatile xdata )0xfed9)

#define	PWM1_CCR3H ((unsigned char volatile xdata )0xfed9)

#define	PWM1_CCR3L ((unsigned char volatile xdata )0xfeda)

#define	PWM1_CCR4 ((unsigned int volatile xdata )0xfedb)

#define	PWM1_CCR4H ((unsigned char volatile xdata )0xfedb)

#define	PWM1_CCR4L ((unsigned char volatile xdata )0xfedc)

#define	PWM1_BKR ((unsigned char volatile xdata )0xfedd)

#define	PWM1_DTR ((unsigned char volatile xdata )0xfede)

#define	PWM1_OISR ((unsigned char volatile xdata )0xfedf)

#define	PWM2_CR1 ((unsigned char volatile xdata )0xfee0)

#define	PWM2_CR2 ((unsigned char volatile xdata )0xfee1)

#define	PWM2_SMCR ((unsigned char volatile xdata )0xfee2)

#define	PWM2_ETR ((unsigned char volatile xdata )0xfee3)

#define	PWM2_IER ((unsigned char volatile xdata )0xfee4)

#define	PWM2_SR1 ((unsigned char volatile xdata )0xfee5)

#define	PWM2_SR2 ((unsigned char volatile xdata )0xfee6)

#define	PWM2_EGR ((unsigned char volatile xdata )0xfee7)

#define	PWM2_CCMR1 ((unsigned char volatile xdata )0xfee8)

#define	PWM2_CCMR2 ((unsigned char volatile xdata )0xfee9)

#define	PWM2_CCMR3 ((unsigned char volatile xdata )0xfeea)

#define	PWM2_CCMR4 ((unsigned char volatile xdata )0xfeeb)

#define	PWM2_CCER1 ((unsigned char volatile xdata )0xfeec)

#define	PWM2_CCER2 ((unsigned char volatile xdata )0xfeed)

#define	PWM2_CNTR ((unsigned int volatile xdata )0xfeee)

#define	PWM2_CNTRH ((unsigned char volatile xdata )0xfeee)

#define	PWM2_CNTRL ((unsigned char volatile xdata )0xfeef)

#define	PWM2_PSCR ((unsigned int volatile xdata )0xfef0)

#define	PWM2_PSCRH ((unsigned char volatile xdata )0xfef0)

#define	PWM2_PSCRL ((unsigned char volatile xdata )0xfef1)

#define	PWM2_ARR ((unsigned int volatile xdata )0xfef2)

#define	PWM2_ARRH ((unsigned char volatile xdata )0xfef2)

#define	PWM2_ARRL ((unsigned char volatile xdata )0xfef3)

#define	PWM2_RCR ((unsigned char volatile xdata )0xfef4)

#define	PWM2_CCR1 ((unsigned int volatile xdata )0xfef5)

#define	PWM2_CCR1H ((unsigned char volatile xdata )0xfef5)

#define	PWM2_CCR1L ((unsigned char volatile xdata )0xfef6)

#define	PWM2_CCR2 ((unsigned int volatile xdata )0xfef7)

#define	PWM2_CCR2H ((unsigned char volatile xdata )0xfef7)

#define	PWM2_CCR2L ((unsigned char volatile xdata )0xfef8)

#define	PWM2_CCR3 ((unsigned int volatile xdata )0xfef9)

#define	PWM2_CCR3H ((unsigned char volatile xdata )0xfef9)

#define	PWM2_CCR3L ((unsigned char volatile xdata )0xfefa)

#define	PWM2_CCR4 ((unsigned int volatile xdata )0xfefb)

#define	PWM2_CCR4H ((unsigned char volatile xdata )0xfefb)

#define	PWM2_CCR4L ((unsigned char volatile xdata )0xfefc)

#define	PWM2_BKR ((unsigned char volatile xdata )0xfefd)

#define	PWM2_DTR ((unsigned char volatile xdata )0xfefe)

#define	PWM2_OISR ((unsigned char volatile xdata )0xfeff)

#define	PWMA_ETRPS ((unsigned char volatile xdata )0xfeb0)

#define	PWMA_ENO ((unsigned char volatile xdata )0xfeb1)

#define	PWMA_PS ((unsigned char volatile xdata )0xfeb2)

#define	PWMA_IOAUX ((unsigned char volatile xdata )0xfeb3)

#define	PWMB_ETRPS ((unsigned char volatile xdata )0xfeb4)

#define	PWMB_ENO ((unsigned char volatile xdata )0xfeb5)

#define	PWMB_PS ((unsigned char volatile xdata )0xfeb6)

#define	PWMB_IOAUX ((unsigned char volatile xdata )0xfeb7)

#define	PWMA_CR1 ((unsigned char volatile xdata )0xfec0)

#define	PWMA_CR2 ((unsigned char volatile xdata )0xfec1)

#define	PWMA_SMCR ((unsigned char volatile xdata )0xfec2)

#define	PWMA_ETR ((unsigned char volatile xdata )0xfec3)

#define	PWMA_IER ((unsigned char volatile xdata )0xfec4)

#define	PWMA_SR1 ((unsigned char volatile xdata )0xfec5)

#define	PWMA_SR2 ((unsigned char volatile xdata )0xfec6)

#define	PWMA_EGR ((unsigned char volatile xdata )0xfec7)

#define	PWMA_CCMR1 ((unsigned char volatile xdata )0xfec8)

#define	PWMA_CCMR2 ((unsigned char volatile xdata )0xfec9)

#define	PWMA_CCMR3 ((unsigned char volatile xdata )0xfeca)

#define	PWMA_CCMR4 ((unsigned char volatile xdata )0xfecb)

#define	PWMA_CCER1 ((unsigned char volatile xdata )0xfecc)

#define	PWMA_CCER2 ((unsigned char volatile xdata )0xfecd)

#define	PWMA_CNTR ((unsigned int volatile xdata )0xfece)

#define	PWMA_CNTRH ((unsigned char volatile xdata )0xfece)

#define	PWMA_CNTRL ((unsigned char volatile xdata )0xfecf)

#define	PWMA_PSCR ((unsigned int volatile xdata )0xfed0)

#define	PWMA_PSCRH ((unsigned char volatile xdata )0xfed0)

#define	PWMA_PSCRL ((unsigned char volatile xdata )0xfed1)

#define	PWMA_ARR ((unsigned int volatile xdata )0xfed2)

#define	PWMA_ARRH ((unsigned char volatile xdata )0xfed2)

#define	PWMA_ARRL ((unsigned char volatile xdata )0xfed3)

#define	PWMA_RCR ((unsigned char volatile xdata )0xfed4)

#define	PWMA_CCR1 ((unsigned int volatile xdata )0xfed5)

#define	PWMA_CCR1H ((unsigned char volatile xdata )0xfed5)

#define	PWMA_CCR1L ((unsigned char volatile xdata )0xfed6)

#define	PWMA_CCR2 ((unsigned int volatile xdata )0xfed7)

#define	PWMA_CCR2H ((unsigned char volatile xdata )0xfed7)

#define	PWMA_CCR2L ((unsigned char volatile xdata )0xfed8)

#define	PWMA_CCR3 ((unsigned int volatile xdata )0xfed9)

#define	PWMA_CCR3H ((unsigned char volatile xdata )0xfed9)

#define	PWMA_CCR3L ((unsigned char volatile xdata )0xfeda)

#define	PWMA_CCR4 ((unsigned int volatile xdata )0xfedb)

#define	PWMA_CCR4H ((unsigned char volatile xdata )0xfedb)

#define	PWMA_CCR4L ((unsigned char volatile xdata )0xfedc)

#define	PWMA_BKR ((unsigned char volatile xdata )0xfedd)

#define	PWMA_DTR ((unsigned char volatile xdata )0xfede)

#define	PWMA_OISR ((unsigned char volatile xdata )0xfedf)

#define	PWMB_CR1 ((unsigned char volatile xdata )0xfee0)

#define	PWMB_CR2 ((unsigned char volatile xdata )0xfee1)

#define	PWMB_SMCR ((unsigned char volatile xdata )0xfee2)

#define	PWMB_ETR ((unsigned char volatile xdata )0xfee3)

#define	PWMB_IER ((unsigned char volatile xdata )0xfee4)

#define	PWMB_SR1 ((unsigned char volatile xdata )0xfee5)

#define	PWMB_SR2 ((unsigned char volatile xdata )0xfee6)

#define	PWMB_EGR ((unsigned char volatile xdata )0xfee7)

#define	PWMB_CCMR1 ((unsigned char volatile xdata )0xfee8)

#define	PWMB_CCMR2 ((unsigned char volatile xdata )0xfee9)

#define	PWMB_CCMR3 ((unsigned char volatile xdata )0xfeea)

#define	PWMB_CCMR4 ((unsigned char volatile xdata )0xfeeb)

#define	PWMB_CCER1 ((unsigned char volatile xdata )0xfeec)

#define	PWMB_CCER2 ((unsigned char volatile xdata )0xfeed)

#define	PWMB_CNTR ((unsigned int volatile xdata )0xfeee)

#define	PWMB_CNTRH ((unsigned char volatile xdata )0xfeee)

#define	PWMB_CNTRL ((unsigned char volatile xdata )0xfeef)

#define	PWMB_PSCR ((unsigned int volatile xdata )0xfef0)

#define	PWMB_PSCRH ((unsigned char volatile xdata )0xfef0)

#define	PWMB_PSCRL ((unsigned char volatile xdata )0xfef1)

#define	PWMB_ARR ((unsigned int volatile xdata )0xfef2)

#define	PWMB_ARRH ((unsigned char volatile xdata )0xfef2)

#define	PWMB_ARRL ((unsigned char volatile xdata )0xfef3)

#define	PWMB_RCR ((unsigned char volatile xdata )0xfef4)

#define	PWMB_CCR5 ((unsigned int volatile xdata )0xfef5)

#define	PWMB_CCR5H ((unsigned char volatile xdata )0xfef5)

#define	PWMB_CCR5L ((unsigned char volatile xdata )0xfef6)

#define	PWMB_CCR6 ((unsigned int volatile xdata )0xfef7)

#define	PWMB_CCR6H ((unsigned char volatile xdata )0xfef7)

#define	PWMB_CCR6L ((unsigned char volatile xdata )0xfef8)

#define	PWMB_CCR7 ((unsigned int volatile xdata )0xfef9)

#define	PWMB_CCR7H ((unsigned char volatile xdata )0xfef9)

#define	PWMB_CCR7L ((unsigned char volatile xdata )0xfefa)

#define	PWMB_CCR8 ((unsigned int volatile xdata )0xfefb)

#define	PWMB_CCR8H ((unsigned char volatile xdata )0xfefb)

#define	PWMB_CCR8L ((unsigned char volatile xdata )0xfefc)

#define	PWMB_BKR ((unsigned char volatile xdata )0xfefd)

#define	PWMB_DTR ((unsigned char volatile xdata )0xfefe)

#define	PWMB_OISR ((unsigned char volatile xdata )0xfeff)

#define	PWMC ((__IO uint16_t xdata ) PWMC_ADDRESS)

#define	PWMCH ((__IO uint8_t xdata ) PWMCH_ADDRESS)

#define	PWMCL ((__IO uint8_t xdata ) PWMCL_ADDRESS)

#define	PWMCKS ((__IO uint8_t xdata ) PWMCKS_ADDRESS)

#define	TADCP ((__IO uint8_t xdata ) TADCP_ADDRESS)

#define	TADCPH ((__IO uint8_t xdata ) TADCPH_ADDRESS)

#define	TADCPL ((__IO uint8_t xdata ) TADCPL_ADDRESS)

#define	PWMxT1(PWMxT1_ADDRESS) ( (__IO uint16_t xdata ) PWMxT1_ADDRESS)

#define	PWMxT2(PWMxT2_ADDRESS) ( (__IO uint16_t xdata ) PWMxT2_ADDRESS)

#define	PWMxCR(PWMxCR_ADDRESS) ( (__IO uint8_t xdata ) PWMxCR_ADDRESS)

#define	PWMxHLD(PWMxHLD_ADDRESS) ( (__IO uint8_t xdata )PWMxHLD_ADDRESS)

#define	PWM0T1 ((__IO uint16_t xdata ) PWM0T1_ADDRESS)

#define	PWM0T1H ((__IO uint8_t xdata )PWM0T1H_ADDRESS)

#define	PWM0T1L ((__IO uint8_t xdata )PWM0T1L_ADDRESS)

#define	PWM0T2 ((__IO uint16_t xdata ) PWM0T2_ADDRESS)

#define	PWM0T2H ((__IO uint8_t xdata )PWM0T2H_ADDRESS)

#define	PWM0T2L ((__IO uint8_t xdata )PWM0T2L_ADDRESS)

#define	PWM0CR ((__IO uint8_t xdata ) PWM0CR_ADDRESS)

#define	PWM0HLD ((__IO uint8_t xdata )PWM0HLD_ADDRESS)

#define	PWM1T1 ((__IO uint16_t xdata ) PWM1T1_ADDRESS)

#define	PWM1T1H ((__IO uint8_t xdata )PWM1T1H_ADDRESS)

#define	PWM1T1L ((__IO uint8_t xdata )PWM1T1L_ADDRESS)

#define	PWM1T2 ((__IO uint16_t xdata ) PWM1T2_ADDRESS)

#define	PWM1T2H ((__IO uint8_t xdata )PWM1T2H_ADDRESS)

#define	PWM1T2L ((__IO uint8_t xdata )PWM1T2L_ADDRESS)

#define	PWM1CR ((__IO uint8_t xdata ) PWM1CR_ADDRESS)

#define	PWM1HLD ((__IO uint8_t xdata )PWM1HLD_ADDRESS)

#define	PWM2T1 ((__IO uint16_t xdata ) PWM2T1_ADDRESS)

#define	PWM2T1H ((__IO uint8_t xdata )PWM2T1H_ADDRESS)

#define	PWM2T1L ((__IO uint8_t xdata )PWM2T1L_ADDRESS)

#define	PWM2T2 ((__IO uint16_t xdata ) PWM2T2_ADDRESS)

#define	PWM2T2H ((__IO uint8_t xdata )PWM2T2H_ADDRESS)

#define	PWM2T2L ((__IO uint8_t xdata )PWM2T2L_ADDRESS)

#define	PWM2CR ((__IO uint8_t xdata ) PWM2CR_ADDRESS)

#define	PWM2HLD ((__IO uint8_t xdata )PWM2HLD_ADDRESS)

#define	PWM3T1 ((__IO uint16_t xdata ) PWM3T1_ADDRESS)

#define	PWM3T1H ((__IO uint8_t xdata )PWM3T1H_ADDRESS)

#define	PWM3T1L ((__IO uint8_t xdata )PWM3T1L_ADDRESS)

#define	PWM3T2 ((__IO uint16_t xdata ) PWM3T2_ADDRESS)

#define	PWM3T2H ((__IO uint8_t xdata )PWM3T2H_ADDRESS)

#define	PWM3T2L ((__IO uint8_t xdata )PWM3T2L_ADDRESS)

#define	PWM3CR ((__IO uint8_t xdata ) PWM3CR_ADDRESS)

#define	PWM3HLD ((__IO uint8_t xdata )PWM3HLD_ADDRESS)

#define	PWM4T1 ((__IO uint16_t xdata ) PWM4T1_ADDRESS)

#define	PWM4T1H ((__IO uint8_t xdata )PWM4T1H_ADDRESS)

#define	PWM4T1L ((__IO uint8_t xdata )PWM4T1L_ADDRESS)

#define	PWM4T2 ((__IO uint16_t xdata ) PWM4T2_ADDRESS)

#define	PWM4T2H ((__IO uint8_t xdata )PWM4T2H_ADDRESS)

#define	PWM4T2L ((__IO uint8_t xdata )PWM4T2L_ADDRESS)

#define	PWM4CR ((__IO uint8_t xdata ) PWM4CR_ADDRESS)

#define	PWM4HLD ((__IO uint8_t xdata )PWM4HLD_ADDRESS)

#define	PWM5T1 ((__IO uint16_t xdata ) PWM5T1_ADDRESS)

#define	PWM5T1H ((__IO uint8_t xdata )PWM5T1H_ADDRESS)

#define	PWM5T1L ((__IO uint8_t xdata )PWM5T1L_ADDRESS)

#define	PWM5T2 ((__IO uint16_t xdata ) PWM5T2_ADDRESS)

#define	PWM5T2H ((__IO uint8_t xdata )PWM5T2H_ADDRESS)

#define	PWM5T2L ((__IO uint8_t xdata )PWM5T2L_ADDRESS)

#define	PWM5CR ((__IO uint8_t xdata ) PWM5CR_ADDRESS)

#define	PWM5HLD ((__IO uint8_t xdata )PWM5HLD_ADDRESS)

#define	PWM6T1 ((__IO uint16_t xdata ) PWM6T1_ADDRESS)

#define	PWM6T1H ((__IO uint8_t xdata )PWM6T1H_ADDRESS)

#define	PWM6T1L ((__IO uint8_t xdata )PWM6T1L_ADDRESS)

#define	PWM6T2 ((__IO uint16_t xdata ) PWM6T2_ADDRESS)

#define	PWM6T2H ((__IO uint8_t xdata )PWM6T2H_ADDRESS)

#define	PWM6T2L ((__IO uint8_t xdata )PWM6T2L_ADDRESS)

#define	PWM6CR ((__IO uint8_t xdata ) PWM6CR_ADDRESS)

#define	PWM6HLD ((__IO uint8_t xdata )PWM6HLD_ADDRESS)

#define	PWM7T1 ((__IO uint16_t xdata ) PWM7T1_ADDRESS)

#define	PWM7T1H ((__IO uint8_t xdata )PWM7T1H_ADDRESS)

#define	PWM7T1L ((__IO uint8_t xdata )PWM7T1L_ADDRESS)

#define	PWM7T2 ((__IO uint16_t xdata ) PWM7T2_ADDRESS)

#define	PWM7T2H ((__IO uint8_t xdata )PWM7T2H_ADDRESS)

#define	PWM7T2L ((__IO uint8_t xdata )PWM7T2L_ADDRESS)

#define	PWM7CR ((__IO uint8_t xdata ) PWM7CR_ADDRESS)

#define	PWM7HLD ((__IO uint8_t xdata )PWM7HLD_ADDRESS)

#define	SPSTAT_ADDRESS 0xCDU

#define	SPCTL_ADDRESS 0xCEU

#define	SPDAT_ADDRESS 0xCFU

#define	SPIF 0x80

#define	WCOL 0x40

#define	SSIG 0x80

#define	SPEN 0x40

#define	DORD 0x20

#define	MSTR 0x10

#define	CPOL 0x08

#define	CPHA 0x04

#define	I2C_BASE 0xFE80U

#define	I2CCFG_ADDRESS (I2C_BASE + 0x00U)

#define	I2CMSCR_ADDRESS (I2C_BASE + 0x01U)

#define	I2CMSST_ADDRESS (I2C_BASE + 0x02U)

#define	I2CSLCR_ADDRESS (I2C_BASE + 0x03U)

#define	I2CSLST_ADDRESS (I2C_BASE + 0x04U)

#define	I2CSLADR_ADDRESS (I2C_BASE + 0x05U)

#define	I2CTXD_ADDRESS (I2C_BASE + 0x06U)

#define	I2CRXD_ADDRESS (I2C_BASE + 0x07U)

#define	ENI2C 0x80

#define	MSSL 0x40

#define	EMSI 0x80

#define	MSBUSY 0x80

#define	MSIF 0x40

#define	MSACKI 0x02

#define	MSACKO 0x01

#define	ESTAI 0x40

#define	ERXI 0x20

#define	ETXI 0x10

#define	ESTOI 0x08

#define	SLRST 0x01

#define	SLBUSY 0x80

#define	STAIF 0x40

#define	RXIF 0x20

#define	TXIF 0x10

#define	STOIF 0x08

#define	TXING 0x04

#define	SLACKI 0x02

#define	SLACKO 0x01

#define	I2CCFG ((__IO uint8_t xdata ) I2CCFG_ADDRESS)

#define	I2CMSCR ((__IO uint8_t xdata ) I2CMSCR_ADDRESS)

#define	I2CMSST ((__IO uint8_t xdata ) I2CMSST_ADDRESS)

#define	I2CSLCR ((__IO uint8_t xdata ) I2CSLCR_ADDRESS)

#define	I2CSLST ((__IO uint8_t xdata )I2CSLST_ADDRESS)

#define	I2CSLADR ((__IO uint8_t xdata )I2CSLADR_ADDRESS)

#define	I2CTXD ((__IO uint8_t xdata ) I2CTXD_ADDRESS)

#define	I2CRXD ((__IO uint8_t xdata ) I2CRXD_ADDRESS)

#define	MDU16_BASE 0xFCF0U

#define	MD3_ADDRESS (MDU16_BASE)

#define	MD2_ADDRESS (MDU16_BASE + 0x0001U)

#define	MD1_ADDRESS (MDU16_BASE + 0x0002U)

#define	MD0_ADDRESS (MDU16_BASE + 0x0003U)

#define	MD5_ADDRESS (MDU16_BASE + 0x0004U)

#define	MD4_ADDRESS (MDU16_BASE + 0x0005U)

#define	ARCON_ADDRESS (MDU16_BASE + 0x0006U)

#define	OPCON_ADDRESS (MDU16_BASE + 0x0007U)

#define	MDU16 (* (MDU16_TypeDef xdata *) MDU16_BASE)

#define	MD3U32 ((__IO uint32_t xdata ) MD3_ADDRESS)

#define	MD3U16 ((__IO uint16_t xdata ) MD3_ADDRESS)

#define	MD1U16 ((__IO uint16_t xdata ) MD1_ADDRESS)

#define	MD5U16 ((__IO uint16_t xdata ) MD5_ADDRESS)

#define	MD3 ((__IO uint8_t xdata ) MD3_ADDRESS)

#define	MD2 ((__IO uint8_t xdata ) MD2_ADDRESS)

#define	MD1 ((__IO uint8_t xdata ) MD1_ADDRESS)

#define	MD0 ((__IO uint8_t xdata ) MD0_ADDRESS)

#define	MD5 ((__IO uint8_t xdata ) MD5_ADDRESS)

#define	MD4 ((__IO uint8_t xdata ) MD4_ADDRESS)

#define	ARCON ((__IO uint8_t xdata ) ARCON_ADDRESS)

#define	OPCON ((__IO uint8_t xdata ) OPCON_ADDRESS)

#define	SUBCLK

变量
sfr	ACC = 0xe0

sfr	B = 0xf0

sfr	PSW = 0xd0

sbit	CY = PSW^7

sbit	AC = PSW^6

sbit	F0 = PSW^5

sbit	RS1 = PSW^4

sbit	RS0 = PSW^3

sbit	OV = PSW^2

sbit	F1 = PSW^1

sbit	P = PSW^0

sfr	SP = 0x81

sfr	DPL = 0x82

sfr	DPH = 0x83

sfr	TA = 0xae

sfr	DPS = 0xe3

sfr	DPL1 = 0xe4

sfr	DPH1 = 0xe5

sfr	AUXR = AUXR_ADDRESS

sfr	AUXR2 = AUXR2_ADDRESS

sfr	P_SW1 = PER_SW1_ADDRESS

sfr	P_SW2 = PER_SW2_ADDRESS

sfr	IRCBAND = IRCBAND_ADDRESS

sfr	IRTRIM = IRTRIM_ADDRESS

sfr	LIRTRIM = LIRTRIM_ADDRESS

sfr	PCON = PCON_ADDRESS

sfr	VOCTRL = VOCTRL_ADDRESS

sfr	IE = IE_ADDRESS

sfr	IE2 = IE2_ADDRESS

sfr	IP = IP_ADDRESS

sfr	IPH = IPH_ADDRESS

sfr	IP2 = IP2H_ADDRESS

sfr	IP2H = IP2H_ADDRESS

sfr	IP3 = IP3_ADDRESS

sfr	IP3H = IP3H_ADDRESS

sfr	INTCLKO = INTCLKO_ADDRESS

sfr	AUXINTIF = AUXINTIF_ADDRESS

sbit	EA = IE^7

sbit	ELVD = IE^6

sbit	EADC = IE^5

sbit	ES = IE^4

sbit	ET1 = IE^3

sbit	EX1 = IE^2

sbit	ET0 = IE^1

sbit	EX0 = IE^0

sbit	PPCA = IP^7

sbit	PLVD = IP^6

sbit	PADC = IP^5

sbit	PS = IP^4

sbit	PT1 = IP^3

sbit	PX1 = IP^2

sbit	PT0 = IP^1

sbit	PX0 = IP^0

sfr	P0 = P0_ADDRESS

sfr	P1 = P1_ADDRESS

sfr	P2 = P2_ADDRESS

sfr	P3 = P3_ADDRESS

sfr	P4 = P4_ADDRESS

sfr	P5 = P5_ADDRESS

sfr	P6 = P6_ADDRESS

sfr	P7 = P7_ADDRESS

sbit	P00 = P0^0

sbit	P01 = P0^1

sbit	P02 = P0^2

sbit	P03 = P0^3

sbit	P04 = P0^4

sbit	P05 = P0^5

sbit	P06 = P0^6

sbit	P07 = P0^7

sbit	P10 = P1^0

sbit	P11 = P1^1

sbit	P12 = P1^2

sbit	P13 = P1^3

sbit	P14 = P1^4

sbit	P15 = P1^5

sbit	P16 = P1^6

sbit	P17 = P1^7

sbit	P20 = P2^0

sbit	P21 = P2^1

sbit	P22 = P2^2

sbit	P23 = P2^3

sbit	P24 = P2^4

sbit	P25 = P2^5

sbit	P26 = P2^6

sbit	P27 = P2^7

sbit	P30 = P3^0

sbit	P31 = P3^1

sbit	P32 = P3^2

sbit	P33 = P3^3

sbit	P34 = P3^4

sbit	P35 = P3^5

sbit	P36 = P3^6

sbit	P37 = P3^7

sbit	P40 = P4^0

sbit	P41 = P4^1

sbit	P42 = P4^2

sbit	P43 = P4^3

sbit	P44 = P4^4

sbit	P50 = P5^0

sbit	P51 = P5^1

sbit	P52 = P5^2

sbit	P53 = P5^3

sbit	P54 = P5^4

sbit	P55 = P5^5

sbit	P56 = P5^6

sbit	P57 = P5^7

sbit	P60 = P6^0

sbit	P61 = P6^1

sbit	P62 = P6^2

sbit	P63 = P6^3

sbit	P64 = P6^4

sbit	P65 = P6^5

sbit	P66 = P6^6

sbit	P67 = P6^7

sbit	P70 = P7^0

sbit	P71 = P7^1

sbit	P72 = P7^2

sbit	P73 = P7^3

sbit	P74 = P7^4

sbit	P75 = P7^5

sbit	P76 = P7^6

sbit	P77 = P7^7

sfr	P0M1 = P0M1_ADDRESS

sfr	P1M1 = P1M1_ADDRESS

sfr	P2M1 = P2M1_ADDRESS

sfr	P3M1 = P3M1_ADDRESS

sfr	P4M1 = P4M1_ADDRESS

sfr	P5M1 = P5M1_ADDRESS

sfr	P6M1 = P6M1_ADDRESS

sfr	P7M1 = P7M1_ADDRESS

sfr	P0M0 = P0M0_ADDRESS

sfr	P1M0 = P1M0_ADDRESS

sfr	P2M0 = P2M0_ADDRESS

sfr	P3M0 = P3M0_ADDRESS

sfr	P4M0 = P4M0_ADDRESS

sfr	P5M0 = P5M0_ADDRESS

sfr	P6M0 = P6M0_ADDRESS

sfr	P7M0 = P7M0_ADDRESS

sfr	BUS_SPEED = BUS_SPEED_ADDRESS

sfr	WDT_CONTR = WDT_ADDRESS

sfr	RSTCFG = RSTCFG_ADDRESS

sfr	TCON = TCON_ADDRESS

sfr	TMOD = TMOD_ADDRESS

sfr	T0L = T0L_ADDRESS

sfr	T1L = T1L_ADDRESS

sfr	T0H = T0H_ADDRESS

sfr	T1H = T1H_ADDRESS

sfr	TL0 = T0L_ADDRESS

sfr	TL1 = T1L_ADDRESS

sfr	TH0 = T0H_ADDRESS

sfr	TH1 = T1H_ADDRESS

sfr	T4T3M = T4T3M_ADDRESS

sfr	T4H = T4H_ADDRESS

sfr	T4L = T4L_ADDRESS

sfr	T3H = T3H_ADDRESS

sfr	T3L = T3L_ADDRESS

sfr	T2H = T2H_ADDRESS

sfr	T2L = T2L_ADDRESS

sfr	WKTCL = WKTCL_ADDRESS

sfr	WKTCH = WKTCH_ADDRESS

sbit	TF1 = TCON^7

sbit	TR1 = TCON^6

sbit	TF0 = TCON^5

sbit	TR0 = TCON^4

sbit	IE1 = TCON^3

sbit	IE0 = TCON^1

sbit	IT0 = TCON^0

sbit	IT1 = TCON^2

sfr	SCON = SCON_ADDRESS

sfr	SBUF = SBUF_ADDRESS

sfr	S2CON = S2CON_ADDRESS

sfr	S2BUF = S2BUF_ADDRESS

sfr	S3CON = S3CON_ADDRESS

sfr	S3BUF = S3BUF_ADDRESS

sfr	S4CON = S4CON_ADDRESS

sfr	S4BUF = S4BUF_ADDRESS

sfr	SADDR = SADDR_ADDRESS

sfr	SADEN = SADEN_ADDRESS

sbit	SM0 = SCON^7

sbit	SM1 = SCON^6

sbit	SM2 = SCON^5

sbit	REN = SCON^4

sbit	TB8 = SCON^3

sbit	RB8 = SCON^2

sbit	TI = SCON^1

sbit	RI = SCON^0

sfr	CMPCR1 = CMPCR1_ADDRESS

sfr	CMPCR2 = CMPCR2_ADDRESS

sfr	ADC_CONTR = ADC_CONTR_ADDRESS

sfr	ADC_RES = ADC_RESH_ADDRESS

sfr	ADC_RESL = ADC_RESL_ADDRESS

sfr	ADCCFG = ADCCFG_ADDRESS

sfr	IAP_DATA = IAP_DATA_ADDRESS

sfr	IAP_ADDRH = IAP_ADDRH_ADDRESS

sfr	IAP_ADDRL = IAP_ADDRL_ADDRESS

sfr	IAP_CMD = IAP_CMD_ADDRESS

sfr	IAP_TRIG = IAP_TRIG_ADDRESS

sfr	IAP_CONTR = IAP_CONTR_ADDRESS

sfr	IAP_TPS = IAP_TPS_ADDRESS

sfr	ISP_DATA = ISP_DATA_ADDRESS

sfr	ISP_ADDRH = ISP_ADDRH_ADDRESS

sfr	ISP_ADDRL = ISP_ADDRL_ADDRESS

sfr	ISP_CMD = ISP_CMD_ADDRESS

sfr	ISP_TRIG = ISP_TRIG_ADDRESS

sfr	ISP_CONTR = ISP_CONTR_ADDRESS

sfr	PWMCFG = PWMCFG_ADDRESS

sfr	PWMIF = PWMIF_ADDRESS

sfr	PWMFDCR = PWMFDCR_ADDRESS

sfr	PWMCR = PWMCR_ADDRESS

sfr	SPSTAT = SPSTAT_ADDRESS

sfr	SPCTL = SPCTL_ADDRESS

sfr	SPDAT = SPDAT_ADDRESS

宏定义说明

◆ ADC_CONTR_ADDRESS

#define ADC_CONTR_ADDRESS 0xBCU

◆ ADC_FLAG

#define ADC_FLAG 0x20

◆ ADC_POWER

#define ADC_POWER 0x80

◆ ADC_RES_ADDRESS

#define ADC_RES_ADDRESS 0xBDU

◆ ADC_RESFMT

#define ADC_RESFMT 0x20

◆ ADC_RESH_ADDRESS

#define ADC_RESH_ADDRESS 0xBDU

◆ ADC_RESL_ADDRESS

#define ADC_RESL_ADDRESS 0xBEU

◆ ADC_START

#define ADC_START 0x40

◆ ADCCFG_ADDRESS

#define ADCCFG_ADDRESS 0xDEU

◆ ADCTIM

#define ADCTIM (*(__IO uint8_t xdata *)ADCTIM_ADDRESS)

◆ ADCTIM_ADDRESS

#define ADCTIM_ADDRESS 0xFEA8U

◆ ARCON

#define ARCON (*(__IO uint8_t xdata *) ARCON_ADDRESS)

◆ ARCON_ADDRESS

#define ARCON_ADDRESS (MDU16_BASE + 0x0006U)

◆ AUXINTIF_ADDRESS

#define AUXINTIF_ADDRESS 0xEFU

◆ AUXR2_ADDRESS

#define AUXR2_ADDRESS 0x8FU

◆ AUXR_ADDRESS

#define AUXR_ADDRESS 0x8EU

◆ BUS_SPEED_ADDRESS

#define BUS_SPEED_ADDRESS 0xA1U

◆ CKSEL

#define CKSEL ( *(__IO uint8_t xdata *) CKSEL_ADDRESS)

◆ CKSEL_ADDRESS

#define CKSEL_ADDRESS (SYSCLK_BASE + 0x0000U)

◆ CLKDIV

#define CLKDIV ( *(__IO uint8_t xdata *) CLKDIV_ADDRESS)

◆ CLKDIV_ADDRESS

#define CLKDIV_ADDRESS (SYSCLK_BASE + 0x0001U)

◆ CLR_WDT

#define CLR_WDT 0x10

◆ CMD_FAIL

#define CMD_FAIL 0x10

◆ CMPCR1_ADDRESS

#define CMPCR1_ADDRESS 0xE6U

◆ CMPCR2_ADDRESS

#define CMPCR2_ADDRESS 0xE7U

◆ CMPEN

#define CMPEN 0x80

◆ CMPIF

#define CMPIF 0x40

◆ CMPOE

#define CMPOE 0x02

◆ CMPRES

#define CMPRES 0x01

◆ CPHA

#define CPHA 0x04

◆ CPOL

#define CPOL 0x08

◆ DISFLT

#define DISFLT 0x40

◆ DORD

#define DORD 0x20

◆ EAXFR_DISABLE

#define EAXFR_DISABLE ( ) P_SW2 &= 0x7F

◆ EAXFR_ENABLE

#define EAXFR_ENABLE ( ) P_SW2 |= 0x80

◆ EMSI

#define EMSI 0x80

◆ EN_WDT

#define EN_WDT 0x20

◆ ENI2C

#define ENI2C 0x80

◆ ERXI

#define ERXI 0x20

◆ ESTAI

#define ESTAI 0x40

◆ ESTOI

#define ESTOI 0x08

◆ ETXI

#define ETXI 0x10

◆ FWTH

#define FWTH (*(__I uint8_t idata *)0xF8)

◆ FWTL

#define FWTL (*(__I uint8_t idata *)0xF9)

◆ GPIO_BASE

#define GPIO_BASE 0x80U

◆ GPIO_Px

#define GPIO_Px ( x ) (P##x)

◆ HIRCCR_ADDRESS

#define HIRCCR_ADDRESS (SYSCLK_BASE + 0x0002U)

◆ I2C_BASE

#define I2C_BASE 0xFE80U

◆ I2CCFG

#define I2CCFG (*(__IO uint8_t xdata *) I2CCFG_ADDRESS)

◆ I2CCFG_ADDRESS

#define I2CCFG_ADDRESS (I2C_BASE + 0x00U)

◆ I2CMSCR

#define I2CMSCR (*(__IO uint8_t xdata *) I2CMSCR_ADDRESS)

◆ I2CMSCR_ADDRESS

#define I2CMSCR_ADDRESS (I2C_BASE + 0x01U)

◆ I2CMSST

#define I2CMSST (*(__IO uint8_t xdata *) I2CMSST_ADDRESS)

◆ I2CMSST_ADDRESS

#define I2CMSST_ADDRESS (I2C_BASE + 0x02U)

◆ I2CRXD

#define I2CRXD (*(__IO uint8_t xdata *) I2CRXD_ADDRESS)

◆ I2CRXD_ADDRESS

#define I2CRXD_ADDRESS (I2C_BASE + 0x07U)

◆ I2CSLADR

#define I2CSLADR (*(__IO uint8_t xdata *)I2CSLADR_ADDRESS)

◆ I2CSLADR_ADDRESS

#define I2CSLADR_ADDRESS (I2C_BASE + 0x05U)

◆ I2CSLCR

#define I2CSLCR (*(__IO uint8_t xdata *) I2CSLCR_ADDRESS)

◆ I2CSLCR_ADDRESS

#define I2CSLCR_ADDRESS (I2C_BASE + 0x03U)

◆ I2CSLST

#define I2CSLST (*(__IO uint8_t xdata * )I2CSLST_ADDRESS)

◆ I2CSLST_ADDRESS

#define I2CSLST_ADDRESS (I2C_BASE + 0x04U)

◆ I2CTXD

#define I2CTXD (*(__IO uint8_t xdata *) I2CTXD_ADDRESS)

◆ I2CTXD_ADDRESS

#define I2CTXD_ADDRESS (I2C_BASE + 0x06U)

◆ IAP_ADDRH_ADDRESS

#define IAP_ADDRH_ADDRESS 0xC3U

◆ IAP_ADDRL_ADDRESS

#define IAP_ADDRL_ADDRESS 0xC4U

◆ IAP_CMD_ADDRESS

#define IAP_CMD_ADDRESS 0xC5U

◆ IAP_CONTR_ADDRESS

#define IAP_CONTR_ADDRESS 0xC7U

◆ IAP_DATA_ADDRESS

#define IAP_DATA_ADDRESS 0xC2U

◆ IAP_ERASE

#define IAP_ERASE 0x03

◆ IAP_IDL

#define IAP_IDL 0x00

◆ IAP_READ

#define IAP_READ 0x01

◆ IAP_TPS_ADDRESS

#define IAP_TPS_ADDRESS 0xF5U

◆ IAP_TRIG_ADDRESS

#define IAP_TRIG_ADDRESS 0xC6U

◆ IAP_WRITE

#define IAP_WRITE 0x02

◆ IAPEN

#define IAPEN 0x80

◆ IDL_WDT

#define IDL_WDT 0x08

◆ IE2_ADDRESS

#define IE2_ADDRESS 0xAFU

◆ IE_ADDRESS

#define IE_ADDRESS 0xA8U

◆ INTCLKO_ADDRESS

#define INTCLKO_ADDRESS 0x8FU

◆ INTE_GPIO_ADDRESS

#define INTE_GPIO_ADDRESS 0xFD00U

◆ INTF_GPIO_ADDRESS

#define INTF_GPIO_ADDRESS 0xFD10U

◆ INVCMPO

#define INVCMPO 0x80

◆ IP2_ADDRESS

#define IP2_ADDRESS 0xB5U

◆ IP2H_ADDRESS

#define IP2H_ADDRESS 0xB6U

◆ IP3_ADDRESS

#define IP3_ADDRESS 0xDFU

◆ IP3H_ADDRESS

#define IP3H_ADDRESS 0xEEU

◆ IP_ADDRESS

#define IP_ADDRESS 0xB8U

◆ IPH_ADDRESS

#define IPH_ADDRESS 0xB7U

◆ IRC24MCR

#define IRC24MCR ( *(__IO uint8_t xdata *) HIRCCR_ADDRESS)

◆ IRC32KCR

#define IRC32KCR ( *(__IO uint8_t xdata *) IRC32KCR_ADDRESS)

◆ IRC32KCR_ADDRESS

#define IRC32KCR_ADDRESS (SYSCLK_BASE + 0x0004U)

◆ IRC_22_1184M

#define IRC_22_1184M (*(__I uint8_t idata *)0xFA)

◆ IRC_24M

#define IRC_24M (*(__I uint8_t idata *)0xFB)

◆ IRCBAND_ADDRESS

#define IRCBAND_ADDRESS 0x9DU

◆ IRTRIM_ADDRESS

#define IRTRIM_ADDRESS 0x9FU

◆ ISP_ADDRH_ADDRESS

#define ISP_ADDRH_ADDRESS 0xC3U

◆ ISP_ADDRL_ADDRESS

#define ISP_ADDRL_ADDRESS 0xC4U

◆ ISP_CMD_ADDRESS

#define ISP_CMD_ADDRESS 0xC5U

◆ ISP_CONTR_ADDRESS

#define ISP_CONTR_ADDRESS 0xC7U

◆ ISP_DATA_ADDRESS

#define ISP_DATA_ADDRESS 0xC2U

◆ ISP_TRIG_ADDRESS

#define ISP_TRIG_ADDRESS 0xC6U

◆ LIRTRIM_ADDRESS

#define LIRTRIM_ADDRESS 0x9EU

◆ MCLKOCR

#define MCLKOCR ( *(__IO uint8_t xdata *) MCLKOCR_ADDRESS)

◆ MCLKOCR_ADDRESS

#define MCLKOCR_ADDRESS (SYSCLK_BASE + 0x0005U)

◆ MD0

#define MD0 (*(__IO uint8_t xdata *) MD0_ADDRESS)

◆ MD0_ADDRESS

#define MD0_ADDRESS (MDU16_BASE + 0x0003U)

◆ MD1

#define MD1 (*(__IO uint8_t xdata *) MD1_ADDRESS)

◆ MD1_ADDRESS

#define MD1_ADDRESS (MDU16_BASE + 0x0002U)

◆ MD1U16

#define MD1U16 (*(__IO uint16_t xdata *) MD1_ADDRESS)

◆ MD2

#define MD2 (*(__IO uint8_t xdata *) MD2_ADDRESS)

◆ MD2_ADDRESS

#define MD2_ADDRESS (MDU16_BASE + 0x0001U)

◆ MD3

#define MD3 (*(__IO uint8_t xdata *) MD3_ADDRESS)

◆ MD3_ADDRESS

#define MD3_ADDRESS (MDU16_BASE)

◆ MD3U16

#define MD3U16 (*(__IO uint16_t xdata *) MD3_ADDRESS)

◆ MD3U32

#define MD3U32 (*(__IO uint32_t xdata *) MD3_ADDRESS)

◆ MD4

#define MD4 (*(__IO uint8_t xdata *) MD4_ADDRESS)

◆ MD4_ADDRESS

#define MD4_ADDRESS (MDU16_BASE + 0x0005U)

◆ MD5

#define MD5 (*(__IO uint8_t xdata *) MD5_ADDRESS)

◆ MD5_ADDRESS

#define MD5_ADDRESS (MDU16_BASE + 0x0004U)

◆ MD5U16

#define MD5U16 (*(__IO uint16_t xdata *) MD5_ADDRESS)

◆ MDU16

#define MDU16 (* (MDU16_TypeDef xdata *) MDU16_BASE)

◆ MDU16_BASE

#define MDU16_BASE 0xFCF0U

◆ MSACKI

#define MSACKI 0x02

◆ MSACKO

#define MSACKO 0x01

◆ MSBUSY

#define MSBUSY 0x80

◆ MSIF

#define MSIF 0x40

◆ MSSL

#define MSSL 0x40

◆ MSTR

#define MSTR 0x10

◆ NIE

#define NIE 0x10

◆ NIS

#define NIS 0x04

◆ OPCON

#define OPCON (*(__IO uint8_t xdata *) OPCON_ADDRESS)

◆ OPCON_ADDRESS

#define OPCON_ADDRESS (MDU16_BASE + 0x0007U)

◆ P0_ADDRESS

#define P0_ADDRESS GPIO_BASE

◆ P0DR

#define P0DR ( *(__IO uint8_t xdata *) P0DR_ADDRESS)

◆ P0DR_ADDRESS

#define P0DR_ADDRESS (PxDR_BASE + 0x00U)

◆ P0IE

#define P0IE ( *(__IO uint8_t xdata *) P0IE_ADDRESS)

◆ P0IE_ADDRESS

#define P0IE_ADDRESS (PxIE_BASE + 0x00U)

◆ P0INTE

#define P0INTE ( *(__IO uint8_t xdata *) P0INTE_ADDRESS)

◆ P0INTE_ADDRESS

#define P0INTE_ADDRESS INTE_GPIO_ADDRESS

◆ P0INTF

#define P0INTF ( *(__IO uint8_t xdata *) P0INTF_ADDRESS)

◆ P0INTF_ADDRESS

#define P0INTF_ADDRESS INTF_GPIO_ADDRESS

◆ P0M0_ADDRESS

#define P0M0_ADDRESS PxM0_BASE

◆ P0M1_ADDRESS

#define P0M1_ADDRESS PxM1_BASE

◆ P0NCS

#define P0NCS ( *(__IO uint8_t xdata *) P0NCS_ADDRESS)

◆ P0NCS_ADDRESS

#define P0NCS_ADDRESS (PxNCS_BASE + 0x00U)

◆ P0PU

#define P0PU ( *(__IO uint8_t xdata *) P0PU_ADDRESS)

◆ P0PU_ADDRESS

#define P0PU_ADDRESS (PxPU_BASE + 0x00U)

◆ P0SR

#define P0SR ( *(__IO uint8_t xdata *) P0SR_ADDRESS)

◆ P0SR_ADDRESS

#define P0SR_ADDRESS (PxSR_BASE + 0x00U)

◆ P1_ADDRESS

#define P1_ADDRESS 0x90U

◆ P1DR

#define P1DR ( *(__IO uint8_t xdata *) P1DR_ADDRESS)

◆ P1DR_ADDRESS

#define P1DR_ADDRESS (PxDR_BASE + 0x01U)

◆ P1IE

#define P1IE ( *(__IO uint8_t xdata *) P1IE_ADDRESS)

◆ P1IE_ADDRESS

#define P1IE_ADDRESS (PxIE_BASE + 0x01U)

◆ P1INTE

#define P1INTE ( *(__IO uint8_t xdata *) P1INTE_ADDRESS)

◆ P1INTE_ADDRESS

#define P1INTE_ADDRESS (INTE_GPIO_ADDRESS + 0x0001U)

◆ P1INTF

#define P1INTF ( *(__IO uint8_t xdata *) P1INTF_ADDRESS)

◆ P1INTF_ADDRESS

#define P1INTF_ADDRESS (INTF_GPIO_ADDRESS + 0x0001U)

◆ P1M0_ADDRESS

#define P1M0_ADDRESS 0x92U

◆ P1M1_ADDRESS

#define P1M1_ADDRESS 0x91U

◆ P1NCS

#define P1NCS ( *(__IO uint8_t xdata *) P1NCS_ADDRESS)

◆ P1NCS_ADDRESS

#define P1NCS_ADDRESS (PxNCS_BASE + 0x01U)

◆ P1PU

#define P1PU ( *(__IO uint8_t xdata *) P1PU_ADDRESS)

◆ P1PU_ADDRESS

#define P1PU_ADDRESS (PxPU_BASE + 0x01U)

◆ P1SR

#define P1SR ( *(__IO uint8_t xdata *) P1SR_ADDRESS)

◆ P1SR_ADDRESS

#define P1SR_ADDRESS (PxSR_BASE + 0x01U)

◆ P2_ADDRESS

#define P2_ADDRESS 0xA0U

◆ P2DR

#define P2DR ( *(__IO uint8_t xdata *) P2DR_ADDRESS)

◆ P2DR_ADDRESS

#define P2DR_ADDRESS (PxDR_BASE + 0x02U)

◆ P2INTE

#define P2INTE ( *(__IO uint8_t xdata *) P2INTE_ADDRESS)

◆ P2INTE_ADDRESS

#define P2INTE_ADDRESS (INTE_GPIO_ADDRESS + 0x0002U)

◆ P2INTF

#define P2INTF ( *(__IO uint8_t xdata *) P2INTF_ADDRESS)

◆ P2INTF_ADDRESS

#define P2INTF_ADDRESS (INTF_GPIO_ADDRESS + 0x0002U)

◆ P2M0_ADDRESS

#define P2M0_ADDRESS 0x96U

◆ P2M1_ADDRESS

#define P2M1_ADDRESS 0x95U

◆ P2NCS

#define P2NCS ( *(__IO uint8_t xdata *) P2NCS_ADDRESS)

◆ P2NCS_ADDRESS

#define P2NCS_ADDRESS (PxNCS_BASE + 0x02U)

◆ P2PU

#define P2PU ( *(__IO uint8_t xdata *) P2PU_ADDRESS)

◆ P2PU_ADDRESS

#define P2PU_ADDRESS (PxPU_BASE + 0x02U)

◆ P2SR

#define P2SR ( *(__IO uint8_t xdata *) P2SR_ADDRESS)

◆ P2SR_ADDRESS

#define P2SR_ADDRESS (PxSR_BASE + 0x02U)

◆ P3_ADDRESS

#define P3_ADDRESS 0xB0U

◆ P3DR

#define P3DR ( *(__IO uint8_t xdata *) P3DR_ADDRESS)

◆ P3DR_ADDRESS

#define P3DR_ADDRESS (PxDR_BASE + 0x03U)

◆ P3IE

#define P3IE ( *(__IO uint8_t xdata *) P3IE_ADDRESS)

◆ P3IE_ADDRESS

#define P3IE_ADDRESS (PxIE_BASE + 0x03U)

◆ P3INTE

#define P3INTE ( *(__IO uint8_t xdata *) P3INTE_ADDRESS)

◆ P3INTE_ADDRESS

#define P3INTE_ADDRESS (INTE_GPIO_ADDRESS + 0x0003U)

◆ P3INTF

#define P3INTF ( *(__IO uint8_t xdata *) P3INTF_ADDRESS)

◆ P3INTF_ADDRESS

#define P3INTF_ADDRESS (INTF_GPIO_ADDRESS + 0x0003U)

◆ P3M0_ADDRESS

#define P3M0_ADDRESS 0xB2U

◆ P3M1_ADDRESS

#define P3M1_ADDRESS 0xB1U

◆ P3NCS

#define P3NCS ( *(__IO uint8_t xdata *) P3NCS_ADDRESS)

◆ P3NCS_ADDRESS

#define P3NCS_ADDRESS (PxNCS_BASE + 0x03U)

◆ P3PU

#define P3PU ( *(__IO uint8_t xdata *) P3PU_ADDRESS)

◆ P3PU_ADDRESS

#define P3PU_ADDRESS (PxPU_BASE + 0x03U)

◆ P3SR

#define P3SR ( *(__IO uint8_t xdata *) P3SR_ADDRESS)

◆ P3SR_ADDRESS

#define P3SR_ADDRESS (PxSR_BASE + 0x03U)

◆ P4_ADDRESS

#define P4_ADDRESS 0xC0U

◆ P4DR

#define P4DR ( *(__IO uint8_t xdata *) P4DR_ADDRESS)

◆ P4DR_ADDRESS

#define P4DR_ADDRESS (PxDR_BASE + 0x04U)

◆ P4INTE

#define P4INTE ( *(__IO uint8_t xdata *) P4INTE_ADDRESS)

◆ P4INTE_ADDRESS

#define P4INTE_ADDRESS (INTE_GPIO_ADDRESS + 0x0004U)

◆ P4INTF

#define P4INTF ( *(__IO uint8_t xdata *) P4INTF_ADDRESS)

◆ P4INTF_ADDRESS

#define P4INTF_ADDRESS (INTF_GPIO_ADDRESS + 0x0004U)

◆ P4M0_ADDRESS

#define P4M0_ADDRESS 0xB4U

◆ P4M1_ADDRESS

#define P4M1_ADDRESS 0xB3U

◆ P4NCS

#define P4NCS ( *(__IO uint8_t xdata *) P4NCS_ADDRESS)

◆ P4NCS_ADDRESS

#define P4NCS_ADDRESS (PxNCS_BASE + 0x04U)

◆ P4PU

#define P4PU ( *(__IO uint8_t xdata *) P4PU_ADDRESS)

◆ P4PU_ADDRESS

#define P4PU_ADDRESS (PxPU_BASE + 0x04U)

◆ P4SR

#define P4SR ( *(__IO uint8_t xdata *) P4SR_ADDRESS)

◆ P4SR_ADDRESS

#define P4SR_ADDRESS (PxSR_BASE + 0x04U)

◆ P5_ADDRESS

#define P5_ADDRESS 0xC8U

◆ P5DR

#define P5DR ( *(__IO uint8_t xdata *) P5DR_ADDRESS)

◆ P5DR_ADDRESS

#define P5DR_ADDRESS (PxDR_BASE + 0x05U)

◆ P5INTE

#define P5INTE ( *(__IO uint8_t xdata *) P5INTE_ADDRESS)

◆ P5INTE_ADDRESS

#define P5INTE_ADDRESS (INTE_GPIO_ADDRESS + 0x0005U)

◆ P5INTF

#define P5INTF ( *(__IO uint8_t xdata *) P5INTF_ADDRESS)

◆ P5INTF_ADDRESS

#define P5INTF_ADDRESS (INTF_GPIO_ADDRESS + 0x0005U)

◆ P5M0_ADDRESS

#define P5M0_ADDRESS 0xCAU

◆ P5M1_ADDRESS

#define P5M1_ADDRESS 0xC9U

◆ P5NCS

#define P5NCS ( *(__IO uint8_t xdata *) P5NCS_ADDRESS)

◆ P5NCS_ADDRESS

#define P5NCS_ADDRESS (PxNCS_BASE + 0x05U)

◆ P5PU

#define P5PU ( *(__IO uint8_t xdata *) P5PU_ADDRESS)

◆ P5PU_ADDRESS

#define P5PU_ADDRESS (PxPU_BASE + 0x05U)

◆ P5SR

#define P5SR ( *(__IO uint8_t xdata *) P5SR_ADDRESS)

◆ P5SR_ADDRESS

#define P5SR_ADDRESS (PxSR_BASE + 0x05U)

◆ P6_ADDRESS

#define P6_ADDRESS 0xE8U

◆ P6DR

#define P6DR ( *(__IO uint8_t xdata *) P6DR_ADDRESS)

◆ P6DR_ADDRESS

#define P6DR_ADDRESS (PxDR_BASE + 0x06U)

◆ P6INTE_ADDRESS

#define P6INTE_ADDRESS (INTE_GPIO_ADDRESS + 0x0006U)

◆ P6INTF_ADDRESS

#define P6INTF_ADDRESS (INTF_GPIO_ADDRESS + 0x0006U)

◆ P6M0_ADDRESS

#define P6M0_ADDRESS 0xCCU

◆ P6M1_ADDRESS

#define P6M1_ADDRESS 0xCBU

◆ P6NCS

#define P6NCS ( *(__IO uint8_t xdata *) P6NCS_ADDRESS)

◆ P6NCS_ADDRESS

#define P6NCS_ADDRESS (PxNCS_BASE + 0x06U)

◆ P6PU

#define P6PU ( *(__IO uint8_t xdata *) P6PU_ADDRESS)

◆ P6PU_ADDRESS

#define P6PU_ADDRESS (PxPU_BASE + 0x06U)

◆ P6SR

#define P6SR ( *(__IO uint8_t xdata *) P6SR_ADDRESS)

◆ P6SR_ADDRESS

#define P6SR_ADDRESS (PxSR_BASE + 0x06U)

◆ P7_ADDRESS

#define P7_ADDRESS 0xF8U

◆ P7DR

#define P7DR ( *(__IO uint8_t xdata *) P7DR_ADDRESS)

◆ P7DR_ADDRESS

#define P7DR_ADDRESS (PxDR_BASE + 0x07U)

◆ P7INTE_ADDRESS

#define P7INTE_ADDRESS (INTE_GPIO_ADDRESS + 0x0007U)

◆ P7INTF_ADDRESS

#define P7INTF_ADDRESS (INTF_GPIO_ADDRESS + 0x0007U)

◆ P7M0_ADDRESS

#define P7M0_ADDRESS 0xE2U

◆ P7M1_ADDRESS

#define P7M1_ADDRESS 0xE1U

◆ P7NCS

#define P7NCS ( *(__IO uint8_t xdata *) P7NCS_ADDRESS)

◆ P7NCS_ADDRESS

#define P7NCS_ADDRESS (PxNCS_BASE + 0x07U)

◆ P7PU

#define P7PU ( *(__IO uint8_t xdata *) P7PU_ADDRESS)

◆ P7PU_ADDRESS

#define P7PU_ADDRESS (PxPU_BASE + 0x07U)

◆ P7SR

#define P7SR ( *(__IO uint8_t xdata *) P7SR_ADDRESS)

◆ P7SR_ADDRESS

#define P7SR_ADDRESS (PxSR_BASE + 0x07U)

◆ PCON_ADDRESS

#define PCON_ADDRESS 0x87U

◆ PER_SW1_ADDRESS

#define PER_SW1_ADDRESS 0xA2U

◆ PER_SW2_ADDRESS

#define PER_SW2_ADDRESS 0xBAU

◆ PIE

#define PIE 0x20

◆ PIS

#define PIS 0x08

◆ PWM0_BASE

#define PWM0_BASE 0xFF00U

◆ PWM0CR

#define PWM0CR (*(__IO uint8_t xdata *) PWM0CR_ADDRESS)

◆ PWM0CR_ADDRESS

#define PWM0CR_ADDRESS (PWM0T2L_ADDRESS + 0x01U)

◆ PWM0HLD

#define PWM0HLD (*(__IO uint8_t xdata *)PWM0HLD_ADDRESS)

◆ PWM0HLD_ADDRESS

#define PWM0HLD_ADDRESS (PWM0CR_ADDRESS + 0x01U)

◆ PWM0T1

#define PWM0T1 (*(__IO uint16_t xdata *) PWM0T1_ADDRESS)

◆ PWM0T1_ADDRESS

#define PWM0T1_ADDRESS (PWM0_BASE + 0x00U)

◆ PWM0T1H

#define PWM0T1H (*(__IO uint8_t xdata *)PWM0T1H_ADDRESS)

◆ PWM0T1H_ADDRESS

#define PWM0T1H_ADDRESS (PWM0T1_ADDRESS + 0x00U)

◆ PWM0T1L

#define PWM0T1L (*(__IO uint8_t xdata *)PWM0T1L_ADDRESS)

◆ PWM0T1L_ADDRESS

#define PWM0T1L_ADDRESS (PWM0T1H_ADDRESS + 0x01U)

◆ PWM0T2

#define PWM0T2 (*(__IO uint16_t xdata *) PWM0T2_ADDRESS)

◆ PWM0T2_ADDRESS

#define PWM0T2_ADDRESS (PWM0T1L_ADDRESS + 0x01U)

◆ PWM0T2H

#define PWM0T2H (*(__IO uint8_t xdata *)PWM0T2H_ADDRESS)

◆ PWM0T2H_ADDRESS

#define PWM0T2H_ADDRESS (PWM0T2_ADDRESS + 0x00U)

◆ PWM0T2L

#define PWM0T2L (*(__IO uint8_t xdata *)PWM0T2L_ADDRESS)

◆ PWM0T2L_ADDRESS

#define PWM0T2L_ADDRESS (PWM0T2H_ADDRESS + 0x01U)

◆ PWM1_ARR

#define PWM1_ARR (*(unsigned int volatile xdata *)0xfed2)

◆ PWM1_ARRH

#define PWM1_ARRH (*(unsigned char volatile xdata *)0xfed2)

◆ PWM1_ARRL

#define PWM1_ARRL (*(unsigned char volatile xdata *)0xfed3)

◆ PWM1_BASE

#define PWM1_BASE 0xFF10U

◆ PWM1_BKR

#define PWM1_BKR (*(unsigned char volatile xdata *)0xfedd)

◆ PWM1_CCER1

#define PWM1_CCER1 (*(unsigned char volatile xdata *)0xfecc)

◆ PWM1_CCER2

#define PWM1_CCER2 (*(unsigned char volatile xdata *)0xfecd)

◆ PWM1_CCMR1

#define PWM1_CCMR1 (*(unsigned char volatile xdata *)0xfec8)

◆ PWM1_CCMR2

#define PWM1_CCMR2 (*(unsigned char volatile xdata *)0xfec9)

◆ PWM1_CCMR3

#define PWM1_CCMR3 (*(unsigned char volatile xdata *)0xfeca)

◆ PWM1_CCMR4

#define PWM1_CCMR4 (*(unsigned char volatile xdata *)0xfecb)

◆ PWM1_CCR1

#define PWM1_CCR1 (*(unsigned int volatile xdata *)0xfed5)

◆ PWM1_CCR1H

#define PWM1_CCR1H (*(unsigned char volatile xdata *)0xfed5)

◆ PWM1_CCR1L

#define PWM1_CCR1L (*(unsigned char volatile xdata *)0xfed6)

◆ PWM1_CCR2

#define PWM1_CCR2 (*(unsigned int volatile xdata *)0xfed7)

◆ PWM1_CCR2H

#define PWM1_CCR2H (*(unsigned char volatile xdata *)0xfed7)

◆ PWM1_CCR2L

#define PWM1_CCR2L (*(unsigned char volatile xdata *)0xfed8)

◆ PWM1_CCR3

#define PWM1_CCR3 (*(unsigned int volatile xdata *)0xfed9)

◆ PWM1_CCR3H

#define PWM1_CCR3H (*(unsigned char volatile xdata *)0xfed9)

◆ PWM1_CCR3L

#define PWM1_CCR3L (*(unsigned char volatile xdata *)0xfeda)

◆ PWM1_CCR4

#define PWM1_CCR4 (*(unsigned int volatile xdata *)0xfedb)

◆ PWM1_CCR4H

#define PWM1_CCR4H (*(unsigned char volatile xdata *)0xfedb)

◆ PWM1_CCR4L

#define PWM1_CCR4L (*(unsigned char volatile xdata *)0xfedc)

◆ PWM1_CNTR

#define PWM1_CNTR (*(unsigned int volatile xdata *)0xfece)

◆ PWM1_CNTRH

#define PWM1_CNTRH (*(unsigned char volatile xdata *)0xfece)

◆ PWM1_CNTRL

#define PWM1_CNTRL (*(unsigned char volatile xdata *)0xfecf)

◆ PWM1_CR1

#define PWM1_CR1 (*(unsigned char volatile xdata *)0xfec0)

◆ PWM1_CR2

#define PWM1_CR2 (*(unsigned char volatile xdata *)0xfec1)

◆ PWM1_DTR

#define PWM1_DTR (*(unsigned char volatile xdata *)0xfede)

◆ PWM1_EGR

#define PWM1_EGR (*(unsigned char volatile xdata *)0xfec7)

◆ PWM1_ENO

#define PWM1_ENO (*(unsigned char volatile xdata *)0xfeb1)

◆ PWM1_ETR

#define PWM1_ETR (*(unsigned char volatile xdata *)0xfec3)

◆ PWM1_ETRPS

#define PWM1_ETRPS (*(unsigned char volatile xdata *)0xfeb0)

◆ PWM1_IER

#define PWM1_IER (*(unsigned char volatile xdata *)0xfec4)

◆ PWM1_IOAUX

#define PWM1_IOAUX (*(unsigned char volatile xdata *)0xfeb3)

◆ PWM1_OISR

#define PWM1_OISR (*(unsigned char volatile xdata *)0xfedf)

◆ PWM1_PS

#define PWM1_PS (*(unsigned char volatile xdata *)0xfeb2)

◆ PWM1_PSCR

#define PWM1_PSCR (*(unsigned int volatile xdata *)0xfed0)

◆ PWM1_PSCRH

#define PWM1_PSCRH (*(unsigned char volatile xdata *)0xfed0)

◆ PWM1_PSCRL

#define PWM1_PSCRL (*(unsigned char volatile xdata *)0xfed1)

◆ PWM1_RCR

#define PWM1_RCR (*(unsigned char volatile xdata *)0xfed4)

◆ PWM1_SMCR

#define PWM1_SMCR (*(unsigned char volatile xdata *)0xfec2)

◆ PWM1_SR1

#define PWM1_SR1 (*(unsigned char volatile xdata *)0xfec5)

◆ PWM1_SR2

#define PWM1_SR2 (*(unsigned char volatile xdata *)0xfec6)

◆ PWM1CR

#define PWM1CR (*(__IO uint8_t xdata *) PWM1CR_ADDRESS)

◆ PWM1CR_ADDRESS

#define PWM1CR_ADDRESS (PWM1T2L_ADDRESS + 0x01U)

◆ PWM1HLD

#define PWM1HLD (*(__IO uint8_t xdata *)PWM1HLD_ADDRESS)

◆ PWM1HLD_ADDRESS

#define PWM1HLD_ADDRESS (PWM1CR_ADDRESS + 0x01U)

◆ PWM1T1

#define PWM1T1 (*(__IO uint16_t xdata *) PWM1T1_ADDRESS)

◆ PWM1T1_ADDRESS

#define PWM1T1_ADDRESS (PWM1_BASE + 0x00U)

◆ PWM1T1H

#define PWM1T1H (*(__IO uint8_t xdata *)PWM1T1H_ADDRESS)

◆ PWM1T1H_ADDRESS

#define PWM1T1H_ADDRESS (PWM1T1_ADDRESS + 0x00U)

◆ PWM1T1L

#define PWM1T1L (*(__IO uint8_t xdata *)PWM1T1L_ADDRESS)

◆ PWM1T1L_ADDRESS

#define PWM1T1L_ADDRESS (PWM1T1H_ADDRESS + 0x01U)

◆ PWM1T2

#define PWM1T2 (*(__IO uint16_t xdata *) PWM1T2_ADDRESS)

◆ PWM1T2_ADDRESS

#define PWM1T2_ADDRESS (PWM1T1L_ADDRESS + 0x01U)

◆ PWM1T2H

#define PWM1T2H (*(__IO uint8_t xdata *)PWM1T2H_ADDRESS)

◆ PWM1T2H_ADDRESS

#define PWM1T2H_ADDRESS (PWM1T2_ADDRESS + 0x00U)

◆ PWM1T2L

#define PWM1T2L (*(__IO uint8_t xdata *)PWM1T2L_ADDRESS)

◆ PWM1T2L_ADDRESS

#define PWM1T2L_ADDRESS (PWM1T2H_ADDRESS + 0x01U)

◆ PWM2_ARR

#define PWM2_ARR (*(unsigned int volatile xdata *)0xfef2)

◆ PWM2_ARRH

#define PWM2_ARRH (*(unsigned char volatile xdata *)0xfef2)

◆ PWM2_ARRL

#define PWM2_ARRL (*(unsigned char volatile xdata *)0xfef3)

◆ PWM2_BASE

#define PWM2_BASE 0xFF20U

◆ PWM2_BKR

#define PWM2_BKR (*(unsigned char volatile xdata *)0xfefd)

◆ PWM2_CCER1

#define PWM2_CCER1 (*(unsigned char volatile xdata *)0xfeec)

◆ PWM2_CCER2

#define PWM2_CCER2 (*(unsigned char volatile xdata *)0xfeed)

◆ PWM2_CCMR1

#define PWM2_CCMR1 (*(unsigned char volatile xdata *)0xfee8)

◆ PWM2_CCMR2

#define PWM2_CCMR2 (*(unsigned char volatile xdata *)0xfee9)

◆ PWM2_CCMR3

#define PWM2_CCMR3 (*(unsigned char volatile xdata *)0xfeea)

◆ PWM2_CCMR4

#define PWM2_CCMR4 (*(unsigned char volatile xdata *)0xfeeb)

◆ PWM2_CCR1

#define PWM2_CCR1 (*(unsigned int volatile xdata *)0xfef5)

◆ PWM2_CCR1H

#define PWM2_CCR1H (*(unsigned char volatile xdata *)0xfef5)

◆ PWM2_CCR1L

#define PWM2_CCR1L (*(unsigned char volatile xdata *)0xfef6)

◆ PWM2_CCR2

#define PWM2_CCR2 (*(unsigned int volatile xdata *)0xfef7)

◆ PWM2_CCR2H

#define PWM2_CCR2H (*(unsigned char volatile xdata *)0xfef7)

◆ PWM2_CCR2L

#define PWM2_CCR2L (*(unsigned char volatile xdata *)0xfef8)

◆ PWM2_CCR3

#define PWM2_CCR3 (*(unsigned int volatile xdata *)0xfef9)

◆ PWM2_CCR3H

#define PWM2_CCR3H (*(unsigned char volatile xdata *)0xfef9)

◆ PWM2_CCR3L

#define PWM2_CCR3L (*(unsigned char volatile xdata *)0xfefa)

◆ PWM2_CCR4

#define PWM2_CCR4 (*(unsigned int volatile xdata *)0xfefb)

◆ PWM2_CCR4H

#define PWM2_CCR4H (*(unsigned char volatile xdata *)0xfefb)

◆ PWM2_CCR4L

#define PWM2_CCR4L (*(unsigned char volatile xdata *)0xfefc)

◆ PWM2_CNTR

#define PWM2_CNTR (*(unsigned int volatile xdata *)0xfeee)

◆ PWM2_CNTRH

#define PWM2_CNTRH (*(unsigned char volatile xdata *)0xfeee)

◆ PWM2_CNTRL

#define PWM2_CNTRL (*(unsigned char volatile xdata *)0xfeef)

◆ PWM2_CR1

#define PWM2_CR1 (*(unsigned char volatile xdata *)0xfee0)

◆ PWM2_CR2

#define PWM2_CR2 (*(unsigned char volatile xdata *)0xfee1)

◆ PWM2_DTR

#define PWM2_DTR (*(unsigned char volatile xdata *)0xfefe)

◆ PWM2_EGR

#define PWM2_EGR (*(unsigned char volatile xdata *)0xfee7)

◆ PWM2_ENO

#define PWM2_ENO (*(unsigned char volatile xdata *)0xfeb5)

◆ PWM2_ETR

#define PWM2_ETR (*(unsigned char volatile xdata *)0xfee3)

◆ PWM2_ETRPS

#define PWM2_ETRPS (*(unsigned char volatile xdata *)0xfeb4)

◆ PWM2_IER

#define PWM2_IER (*(unsigned char volatile xdata *)0xfee4)

◆ PWM2_IOAUX

#define PWM2_IOAUX (*(unsigned char volatile xdata *)0xfeb7)

◆ PWM2_OISR

#define PWM2_OISR (*(unsigned char volatile xdata *)0xfeff)

◆ PWM2_PS

#define PWM2_PS (*(unsigned char volatile xdata *)0xfeb6)

◆ PWM2_PSCR

#define PWM2_PSCR (*(unsigned int volatile xdata *)0xfef0)

◆ PWM2_PSCRH

#define PWM2_PSCRH (*(unsigned char volatile xdata *)0xfef0)

◆ PWM2_PSCRL

#define PWM2_PSCRL (*(unsigned char volatile xdata *)0xfef1)

◆ PWM2_RCR

#define PWM2_RCR (*(unsigned char volatile xdata *)0xfef4)

◆ PWM2_SMCR

#define PWM2_SMCR (*(unsigned char volatile xdata *)0xfee2)

◆ PWM2_SR1

#define PWM2_SR1 (*(unsigned char volatile xdata *)0xfee5)

◆ PWM2_SR2

#define PWM2_SR2 (*(unsigned char volatile xdata *)0xfee6)

◆ PWM2CR

#define PWM2CR (*(__IO uint8_t xdata *) PWM2CR_ADDRESS)

◆ PWM2CR_ADDRESS

#define PWM2CR_ADDRESS (PWM2T2L_ADDRESS + 0x01U)

◆ PWM2HLD

#define PWM2HLD (*(__IO uint8_t xdata *)PWM2HLD_ADDRESS)

◆ PWM2HLD_ADDRESS

#define PWM2HLD_ADDRESS (PWM2CR_ADDRESS + 0x01U)

◆ PWM2T1

#define PWM2T1 (*(__IO uint16_t xdata *) PWM2T1_ADDRESS)

◆ PWM2T1_ADDRESS

#define PWM2T1_ADDRESS (PWM2_BASE + 0x00U)

◆ PWM2T1H

#define PWM2T1H (*(__IO uint8_t xdata *)PWM2T1H_ADDRESS)

◆ PWM2T1H_ADDRESS

#define PWM2T1H_ADDRESS (PWM2T1_ADDRESS + 0x00U)

◆ PWM2T1L

#define PWM2T1L (*(__IO uint8_t xdata *)PWM2T1L_ADDRESS)

◆ PWM2T1L_ADDRESS

#define PWM2T1L_ADDRESS (PWM2T1H_ADDRESS + 0x01U)

◆ PWM2T2

#define PWM2T2 (*(__IO uint16_t xdata *) PWM2T2_ADDRESS)

◆ PWM2T2_ADDRESS

#define PWM2T2_ADDRESS (PWM2T1L_ADDRESS + 0x01U)

◆ PWM2T2H

#define PWM2T2H (*(__IO uint8_t xdata *)PWM2T2H_ADDRESS)

◆ PWM2T2H_ADDRESS

#define PWM2T2H_ADDRESS (PWM2T2_ADDRESS + 0x00U)

◆ PWM2T2L

#define PWM2T2L (*(__IO uint8_t xdata *)PWM2T2L_ADDRESS)

◆ PWM2T2L_ADDRESS

#define PWM2T2L_ADDRESS (PWM2T2H_ADDRESS + 0x01U)

◆ PWM3_BASE

#define PWM3_BASE 0xFF30U

◆ PWM3CR

#define PWM3CR (*(__IO uint8_t xdata *) PWM3CR_ADDRESS)

◆ PWM3CR_ADDRESS

#define PWM3CR_ADDRESS (PWM3T2L_ADDRESS + 0x01U)

◆ PWM3HLD

#define PWM3HLD (*(__IO uint8_t xdata *)PWM3HLD_ADDRESS)

◆ PWM3HLD_ADDRESS

#define PWM3HLD_ADDRESS (PWM3CR_ADDRESS + 0x01U)

◆ PWM3T1

#define PWM3T1 (*(__IO uint16_t xdata *) PWM3T1_ADDRESS)

◆ PWM3T1_ADDRESS

#define PWM3T1_ADDRESS (PWM3_BASE + 0x00U)

◆ PWM3T1H

#define PWM3T1H (*(__IO uint8_t xdata *)PWM3T1H_ADDRESS)

◆ PWM3T1H_ADDRESS

#define PWM3T1H_ADDRESS (PWM3T1_ADDRESS + 0x00U)

◆ PWM3T1L

#define PWM3T1L (*(__IO uint8_t xdata *)PWM3T1L_ADDRESS)

◆ PWM3T1L_ADDRESS

#define PWM3T1L_ADDRESS (PWM3T1H_ADDRESS + 0x01U)

◆ PWM3T2

#define PWM3T2 (*(__IO uint16_t xdata *) PWM3T2_ADDRESS)

◆ PWM3T2_ADDRESS

#define PWM3T2_ADDRESS (PWM3T1L_ADDRESS + 0x01U)

◆ PWM3T2H

#define PWM3T2H (*(__IO uint8_t xdata *)PWM3T2H_ADDRESS)

◆ PWM3T2H_ADDRESS

#define PWM3T2H_ADDRESS (PWM3T2_ADDRESS + 0x00U)

◆ PWM3T2L

#define PWM3T2L (*(__IO uint8_t xdata *)PWM3T2L_ADDRESS)

◆ PWM3T2L_ADDRESS

#define PWM3T2L_ADDRESS (PWM3T2H_ADDRESS + 0x01U)

◆ PWM4_BASE

#define PWM4_BASE 0xFF40U

◆ PWM4CR

#define PWM4CR (*(__IO uint8_t xdata *) PWM4CR_ADDRESS)

◆ PWM4CR_ADDRESS

#define PWM4CR_ADDRESS (PWM4T2L_ADDRESS + 0x01U)

◆ PWM4HLD

#define PWM4HLD (*(__IO uint8_t xdata *)PWM4HLD_ADDRESS)

◆ PWM4HLD_ADDRESS

#define PWM4HLD_ADDRESS (PWM4CR_ADDRESS + 0x01U)

◆ PWM4T1

#define PWM4T1 (*(__IO uint16_t xdata *) PWM4T1_ADDRESS)

◆ PWM4T1_ADDRESS

#define PWM4T1_ADDRESS (PWM4_BASE + 0x00U)

◆ PWM4T1H

#define PWM4T1H (*(__IO uint8_t xdata *)PWM4T1H_ADDRESS)

◆ PWM4T1H_ADDRESS

#define PWM4T1H_ADDRESS (PWM4T1_ADDRESS + 0x00U)

◆ PWM4T1L

#define PWM4T1L (*(__IO uint8_t xdata *)PWM4T1L_ADDRESS)

◆ PWM4T1L_ADDRESS

#define PWM4T1L_ADDRESS (PWM4T1H_ADDRESS + 0x01U)

◆ PWM4T2

#define PWM4T2 (*(__IO uint16_t xdata *) PWM4T2_ADDRESS)

◆ PWM4T2_ADDRESS

#define PWM4T2_ADDRESS (PWM4T1L_ADDRESS + 0x01U)

◆ PWM4T2H

#define PWM4T2H (*(__IO uint8_t xdata *)PWM4T2H_ADDRESS)

◆ PWM4T2H_ADDRESS

#define PWM4T2H_ADDRESS (PWM4T2_ADDRESS + 0x00U)

◆ PWM4T2L

#define PWM4T2L (*(__IO uint8_t xdata *)PWM4T2L_ADDRESS)

◆ PWM4T2L_ADDRESS

#define PWM4T2L_ADDRESS (PWM4T2H_ADDRESS + 0x01U)

◆ PWM5_BASE

#define PWM5_BASE 0xFF50U

◆ PWM5CR

#define PWM5CR (*(__IO uint8_t xdata *) PWM5CR_ADDRESS)

◆ PWM5CR_ADDRESS

#define PWM5CR_ADDRESS (PWM5T2L_ADDRESS + 0x01U)

◆ PWM5HLD

#define PWM5HLD (*(__IO uint8_t xdata *)PWM5HLD_ADDRESS)

◆ PWM5HLD_ADDRESS

#define PWM5HLD_ADDRESS (PWM5CR_ADDRESS + 0x01U)

◆ PWM5T1

#define PWM5T1 (*(__IO uint16_t xdata *) PWM5T1_ADDRESS)

◆ PWM5T1_ADDRESS

#define PWM5T1_ADDRESS (PWM5_BASE + 0x00U)

◆ PWM5T1H

#define PWM5T1H (*(__IO uint8_t xdata *)PWM5T1H_ADDRESS)

◆ PWM5T1H_ADDRESS

#define PWM5T1H_ADDRESS (PWM5T1_ADDRESS + 0x00U)

◆ PWM5T1L

#define PWM5T1L (*(__IO uint8_t xdata *)PWM5T1L_ADDRESS)

◆ PWM5T1L_ADDRESS

#define PWM5T1L_ADDRESS (PWM5T1H_ADDRESS + 0x01U)

◆ PWM5T2

#define PWM5T2 (*(__IO uint16_t xdata *) PWM5T2_ADDRESS)

◆ PWM5T2_ADDRESS

#define PWM5T2_ADDRESS (PWM5T1L_ADDRESS + 0x01U)

◆ PWM5T2H

#define PWM5T2H (*(__IO uint8_t xdata *)PWM5T2H_ADDRESS)

◆ PWM5T2H_ADDRESS

#define PWM5T2H_ADDRESS (PWM5T2_ADDRESS + 0x00U)

◆ PWM5T2L

#define PWM5T2L (*(__IO uint8_t xdata *)PWM5T2L_ADDRESS)

◆ PWM5T2L_ADDRESS

#define PWM5T2L_ADDRESS (PWM5T2H_ADDRESS + 0x01U)

◆ PWM6_BASE

#define PWM6_BASE 0xFF60U

◆ PWM6CR

#define PWM6CR (*(__IO uint8_t xdata *) PWM6CR_ADDRESS)

◆ PWM6CR_ADDRESS

#define PWM6CR_ADDRESS (PWM6T2L_ADDRESS + 0x01U)

◆ PWM6HLD

#define PWM6HLD (*(__IO uint8_t xdata *)PWM6HLD_ADDRESS)

◆ PWM6HLD_ADDRESS

#define PWM6HLD_ADDRESS (PWM6CR_ADDRESS + 0x01U)

◆ PWM6T1

#define PWM6T1 (*(__IO uint16_t xdata *) PWM6T1_ADDRESS)

◆ PWM6T1_ADDRESS

#define PWM6T1_ADDRESS (PWM6_BASE + 0x00U)

◆ PWM6T1H

#define PWM6T1H (*(__IO uint8_t xdata *)PWM6T1H_ADDRESS)

◆ PWM6T1H_ADDRESS

#define PWM6T1H_ADDRESS (PWM6T1_ADDRESS + 0x00U)

◆ PWM6T1L

#define PWM6T1L (*(__IO uint8_t xdata *)PWM6T1L_ADDRESS)

◆ PWM6T1L_ADDRESS

#define PWM6T1L_ADDRESS (PWM6T1H_ADDRESS + 0x01U)

◆ PWM6T2

#define PWM6T2 (*(__IO uint16_t xdata *) PWM6T2_ADDRESS)

◆ PWM6T2_ADDRESS

#define PWM6T2_ADDRESS (PWM6T1L_ADDRESS + 0x01U)

◆ PWM6T2H

#define PWM6T2H (*(__IO uint8_t xdata *)PWM6T2H_ADDRESS)

◆ PWM6T2H_ADDRESS

#define PWM6T2H_ADDRESS (PWM6T2_ADDRESS + 0x00U)

◆ PWM6T2L

#define PWM6T2L (*(__IO uint8_t xdata *)PWM6T2L_ADDRESS)

◆ PWM6T2L_ADDRESS

#define PWM6T2L_ADDRESS (PWM6T2H_ADDRESS + 0x01U)

◆ PWM7_BASE

#define PWM7_BASE 0xFF70U

◆ PWM7CR

#define PWM7CR (*(__IO uint8_t xdata *) PWM7CR_ADDRESS)

◆ PWM7CR_ADDRESS

#define PWM7CR_ADDRESS (PWM7T2L_ADDRESS + 0x01U)

◆ PWM7HLD

#define PWM7HLD (*(__IO uint8_t xdata *)PWM7HLD_ADDRESS)

◆ PWM7HLD_ADDRESS

#define PWM7HLD_ADDRESS (PWM7CR_ADDRESS + 0x01U)

◆ PWM7T1

#define PWM7T1 (*(__IO uint16_t xdata *) PWM7T1_ADDRESS)

◆ PWM7T1_ADDRESS

#define PWM7T1_ADDRESS (PWM7_BASE + 0x00U)

◆ PWM7T1H

#define PWM7T1H (*(__IO uint8_t xdata *)PWM7T1H_ADDRESS)

◆ PWM7T1H_ADDRESS

#define PWM7T1H_ADDRESS (PWM7T1_ADDRESS + 0x00U)

◆ PWM7T1L

#define PWM7T1L (*(__IO uint8_t xdata *)PWM7T1L_ADDRESS)

◆ PWM7T1L_ADDRESS

#define PWM7T1L_ADDRESS (PWM7T1H_ADDRESS + 0x01U)

◆ PWM7T2

#define PWM7T2 (*(__IO uint16_t xdata *) PWM7T2_ADDRESS)

◆ PWM7T2_ADDRESS

#define PWM7T2_ADDRESS (PWM7T1L_ADDRESS + 0x01U)

◆ PWM7T2H

#define PWM7T2H (*(__IO uint8_t xdata *)PWM7T2H_ADDRESS)

◆ PWM7T2H_ADDRESS

#define PWM7T2H_ADDRESS (PWM7T2_ADDRESS + 0x00U)

◆ PWM7T2L

#define PWM7T2L (*(__IO uint8_t xdata *)PWM7T2L_ADDRESS)

◆ PWM7T2L_ADDRESS

#define PWM7T2L_ADDRESS (PWM7T2H_ADDRESS + 0x01U)

◆ PWM_BASE1

#define PWM_BASE1 0xFFF0U

◆ PWMA_ARR

#define PWMA_ARR (*(unsigned int volatile xdata *)0xfed2)

◆ PWMA_ARRH

#define PWMA_ARRH (*(unsigned char volatile xdata *)0xfed2)

◆ PWMA_ARRL

#define PWMA_ARRL (*(unsigned char volatile xdata *)0xfed3)

◆ PWMA_BKR

#define PWMA_BKR (*(unsigned char volatile xdata *)0xfedd)

◆ PWMA_CCER1

#define PWMA_CCER1 (*(unsigned char volatile xdata *)0xfecc)

◆ PWMA_CCER2

#define PWMA_CCER2 (*(unsigned char volatile xdata *)0xfecd)

◆ PWMA_CCMR1

#define PWMA_CCMR1 (*(unsigned char volatile xdata *)0xfec8)

◆ PWMA_CCMR2

#define PWMA_CCMR2 (*(unsigned char volatile xdata *)0xfec9)

◆ PWMA_CCMR3

#define PWMA_CCMR3 (*(unsigned char volatile xdata *)0xfeca)

◆ PWMA_CCMR4

#define PWMA_CCMR4 (*(unsigned char volatile xdata *)0xfecb)

◆ PWMA_CCR1

#define PWMA_CCR1 (*(unsigned int volatile xdata *)0xfed5)

◆ PWMA_CCR1H

#define PWMA_CCR1H (*(unsigned char volatile xdata *)0xfed5)

◆ PWMA_CCR1L

#define PWMA_CCR1L (*(unsigned char volatile xdata *)0xfed6)

◆ PWMA_CCR2

#define PWMA_CCR2 (*(unsigned int volatile xdata *)0xfed7)

◆ PWMA_CCR2H

#define PWMA_CCR2H (*(unsigned char volatile xdata *)0xfed7)

◆ PWMA_CCR2L

#define PWMA_CCR2L (*(unsigned char volatile xdata *)0xfed8)

◆ PWMA_CCR3

#define PWMA_CCR3 (*(unsigned int volatile xdata *)0xfed9)

◆ PWMA_CCR3H

#define PWMA_CCR3H (*(unsigned char volatile xdata *)0xfed9)

◆ PWMA_CCR3L

#define PWMA_CCR3L (*(unsigned char volatile xdata *)0xfeda)

◆ PWMA_CCR4

#define PWMA_CCR4 (*(unsigned int volatile xdata *)0xfedb)

◆ PWMA_CCR4H

#define PWMA_CCR4H (*(unsigned char volatile xdata *)0xfedb)

◆ PWMA_CCR4L

#define PWMA_CCR4L (*(unsigned char volatile xdata *)0xfedc)

◆ PWMA_CNTR

#define PWMA_CNTR (*(unsigned int volatile xdata *)0xfece)

◆ PWMA_CNTRH

#define PWMA_CNTRH (*(unsigned char volatile xdata *)0xfece)

◆ PWMA_CNTRL

#define PWMA_CNTRL (*(unsigned char volatile xdata *)0xfecf)

◆ PWMA_CR1

#define PWMA_CR1 (*(unsigned char volatile xdata *)0xfec0)

◆ PWMA_CR2

#define PWMA_CR2 (*(unsigned char volatile xdata *)0xfec1)

◆ PWMA_DTR

#define PWMA_DTR (*(unsigned char volatile xdata *)0xfede)

◆ PWMA_EGR

#define PWMA_EGR (*(unsigned char volatile xdata *)0xfec7)

◆ PWMA_ENO

#define PWMA_ENO (*(unsigned char volatile xdata *)0xfeb1)

◆ PWMA_ETR

#define PWMA_ETR (*(unsigned char volatile xdata *)0xfec3)

◆ PWMA_ETRPS

#define PWMA_ETRPS (*(unsigned char volatile xdata *)0xfeb0)

◆ PWMA_IER

#define PWMA_IER (*(unsigned char volatile xdata *)0xfec4)

◆ PWMA_IOAUX

#define PWMA_IOAUX (*(unsigned char volatile xdata *)0xfeb3)

◆ PWMA_OISR

#define PWMA_OISR (*(unsigned char volatile xdata *)0xfedf)

◆ PWMA_PS

#define PWMA_PS (*(unsigned char volatile xdata *)0xfeb2)

◆ PWMA_PSCR

#define PWMA_PSCR (*(unsigned int volatile xdata *)0xfed0)

◆ PWMA_PSCRH

#define PWMA_PSCRH (*(unsigned char volatile xdata *)0xfed0)

◆ PWMA_PSCRL

#define PWMA_PSCRL (*(unsigned char volatile xdata *)0xfed1)

◆ PWMA_RCR

#define PWMA_RCR (*(unsigned char volatile xdata *)0xfed4)

◆ PWMA_SMCR

#define PWMA_SMCR (*(unsigned char volatile xdata *)0xfec2)

◆ PWMA_SR1

#define PWMA_SR1 (*(unsigned char volatile xdata *)0xfec5)

◆ PWMA_SR2

#define PWMA_SR2 (*(unsigned char volatile xdata *)0xfec6)

◆ PWMB_ARR

#define PWMB_ARR (*(unsigned int volatile xdata *)0xfef2)

◆ PWMB_ARRH

#define PWMB_ARRH (*(unsigned char volatile xdata *)0xfef2)

◆ PWMB_ARRL

#define PWMB_ARRL (*(unsigned char volatile xdata *)0xfef3)

◆ PWMB_BKR

#define PWMB_BKR (*(unsigned char volatile xdata *)0xfefd)

◆ PWMB_CCER1

#define PWMB_CCER1 (*(unsigned char volatile xdata *)0xfeec)

◆ PWMB_CCER2

#define PWMB_CCER2 (*(unsigned char volatile xdata *)0xfeed)

◆ PWMB_CCMR1

#define PWMB_CCMR1 (*(unsigned char volatile xdata *)0xfee8)

◆ PWMB_CCMR2

#define PWMB_CCMR2 (*(unsigned char volatile xdata *)0xfee9)

◆ PWMB_CCMR3

#define PWMB_CCMR3 (*(unsigned char volatile xdata *)0xfeea)

◆ PWMB_CCMR4

#define PWMB_CCMR4 (*(unsigned char volatile xdata *)0xfeeb)

◆ PWMB_CCR5

#define PWMB_CCR5 (*(unsigned int volatile xdata *)0xfef5)

◆ PWMB_CCR5H

#define PWMB_CCR5H (*(unsigned char volatile xdata *)0xfef5)

◆ PWMB_CCR5L

#define PWMB_CCR5L (*(unsigned char volatile xdata *)0xfef6)

◆ PWMB_CCR6

#define PWMB_CCR6 (*(unsigned int volatile xdata *)0xfef7)

◆ PWMB_CCR6H

#define PWMB_CCR6H (*(unsigned char volatile xdata *)0xfef7)

◆ PWMB_CCR6L

#define PWMB_CCR6L (*(unsigned char volatile xdata *)0xfef8)

◆ PWMB_CCR7

#define PWMB_CCR7 (*(unsigned int volatile xdata *)0xfef9)

◆ PWMB_CCR7H

#define PWMB_CCR7H (*(unsigned char volatile xdata *)0xfef9)

◆ PWMB_CCR7L

#define PWMB_CCR7L (*(unsigned char volatile xdata *)0xfefa)

◆ PWMB_CCR8

#define PWMB_CCR8 (*(unsigned int volatile xdata *)0xfefb)

◆ PWMB_CCR8H

#define PWMB_CCR8H (*(unsigned char volatile xdata *)0xfefb)

◆ PWMB_CCR8L

#define PWMB_CCR8L (*(unsigned char volatile xdata *)0xfefc)

◆ PWMB_CNTR

#define PWMB_CNTR (*(unsigned int volatile xdata *)0xfeee)

◆ PWMB_CNTRH

#define PWMB_CNTRH (*(unsigned char volatile xdata *)0xfeee)

◆ PWMB_CNTRL

#define PWMB_CNTRL (*(unsigned char volatile xdata *)0xfeef)

◆ PWMB_CR1

#define PWMB_CR1 (*(unsigned char volatile xdata *)0xfee0)

◆ PWMB_CR2

#define PWMB_CR2 (*(unsigned char volatile xdata *)0xfee1)

◆ PWMB_DTR

#define PWMB_DTR (*(unsigned char volatile xdata *)0xfefe)

◆ PWMB_EGR

#define PWMB_EGR (*(unsigned char volatile xdata *)0xfee7)

◆ PWMB_ENO

#define PWMB_ENO (*(unsigned char volatile xdata *)0xfeb5)

◆ PWMB_ETR

#define PWMB_ETR (*(unsigned char volatile xdata *)0xfee3)

◆ PWMB_ETRPS

#define PWMB_ETRPS (*(unsigned char volatile xdata *)0xfeb4)

◆ PWMB_IER

#define PWMB_IER (*(unsigned char volatile xdata *)0xfee4)

◆ PWMB_IOAUX

#define PWMB_IOAUX (*(unsigned char volatile xdata *)0xfeb7)

◆ PWMB_OISR

#define PWMB_OISR (*(unsigned char volatile xdata *)0xfeff)

◆ PWMB_PS

#define PWMB_PS (*(unsigned char volatile xdata *)0xfeb6)

◆ PWMB_PSCR

#define PWMB_PSCR (*(unsigned int volatile xdata *)0xfef0)

◆ PWMB_PSCRH

#define PWMB_PSCRH (*(unsigned char volatile xdata *)0xfef0)

◆ PWMB_PSCRL

#define PWMB_PSCRL (*(unsigned char volatile xdata *)0xfef1)

◆ PWMB_RCR

#define PWMB_RCR (*(unsigned char volatile xdata *)0xfef4)

◆ PWMB_SMCR

#define PWMB_SMCR (*(unsigned char volatile xdata *)0xfee2)

◆ PWMB_SR1

#define PWMB_SR1 (*(unsigned char volatile xdata *)0xfee5)

◆ PWMB_SR2

#define PWMB_SR2 (*(unsigned char volatile xdata *)0xfee6)

◆ PWMC

#define PWMC (*(__IO uint16_t xdata *) PWMC_ADDRESS)

◆ PWMC_ADDRESS

#define PWMC_ADDRESS (PWM_BASE1 + 0x00U)

◆ PWMCFG_ADDRESS

#define PWMCFG_ADDRESS 0xF1U

◆ PWMCH

#define PWMCH (*(__IO uint8_t xdata *) PWMCH_ADDRESS)

◆ PWMCH_ADDRESS

#define PWMCH_ADDRESS (PWMC_ADDRESS + 0x00U)

◆ PWMCKS

#define PWMCKS (*(__IO uint8_t xdata *) PWMCKS_ADDRESS)

◆ PWMCKS_ADDRESS

#define PWMCKS_ADDRESS (PWMCL_ADDRESS + 0x01U)

◆ PWMCL

#define PWMCL (*(__IO uint8_t xdata *) PWMCL_ADDRESS)

◆ PWMCL_ADDRESS

#define PWMCL_ADDRESS (PWMCH_ADDRESS + 0x01U)

◆ PWMCR_ADDRESS

#define PWMCR_ADDRESS 0xFEU

◆ PWMFDCR_ADDRESS

#define PWMFDCR_ADDRESS 0xF7U

◆ PWMIF_ADDRESS

#define PWMIF_ADDRESS 0xF6U

◆ PWMxCR

#define PWMxCR ( PWMxCR_ADDRESS ) ( *(__IO uint8_t xdata *) PWMxCR_ADDRESS)

◆ PWMxHLD

#define PWMxHLD ( PWMxHLD_ADDRESS ) ( *(__IO uint8_t xdata *)PWMxHLD_ADDRESS)

◆ PWMxT1

#define PWMxT1 ( PWMxT1_ADDRESS ) ( *(__IO uint16_t xdata *) PWMxT1_ADDRESS)

◆ PWMxT2

#define PWMxT2 ( PWMxT2_ADDRESS ) ( *(__IO uint16_t xdata *) PWMxT2_ADDRESS)

◆ Px_DR

#define Px_DR ( x ) (P##x##DR)

◆ Px_IE

#define Px_IE ( x ) (P##x##IE)

◆ Px_M0

#define Px_M0 ( x ) (P##x##M0)

◆ Px_M1

#define Px_M1 ( x ) (P##x##M1)

◆ Px_NCS

#define Px_NCS ( x ) (P##x##NCS)

◆ Px_PU

#define Px_PU ( x ) (P##x##PU)

◆ Px_SR

#define Px_SR ( x ) (P##x##SR)

◆ PxDR_BASE

#define PxDR_BASE 0xFE28U

◆ PxIE_BASE

#define PxIE_BASE 0xFE30U

◆ PxM0_BASE

#define PxM0_BASE 0x94U

◆ PxM1_BASE

#define PxM1_BASE 0x93U

◆ PxNCS_BASE

#define PxNCS_BASE 0xFE18U

◆ PxPU_BASE

#define PxPU_BASE 0xFE10U

◆ PxSR_BASE

#define PxSR_BASE 0xFE20U

◆ RSTCFG_ADDRESS

#define RSTCFG_ADDRESS 0xFFU

◆ RXIF

#define RXIF 0x20

◆ S2BUF_ADDRESS

#define S2BUF_ADDRESS 0x9BU

◆ S2CON_ADDRESS

#define S2CON_ADDRESS 0x9AU

◆ S2RB8

#define S2RB8 0x04

◆ S2REN

#define S2REN 0x10

◆ S2RI

#define S2RI 0x01

◆ S2SM0

#define S2SM0 0x80

◆ S2SM2

#define S2SM2 0x20

◆ S2ST4

#define S2ST4 0x40

◆ S2TB8

#define S2TB8 0x08

◆ S2TI

#define S2TI 0x02

◆ S3BUF_ADDRESS

#define S3BUF_ADDRESS 0xADU

◆ S3CON_ADDRESS

#define S3CON_ADDRESS 0xACU

◆ S3RB8

#define S3RB8 0x04

◆ S3REN

#define S3REN 0x10

◆ S3RI

#define S3RI 0x01

◆ S3SM0

#define S3SM0 0x80

◆ S3SM2

#define S3SM2 0x20

◆ S3ST4

#define S3ST4 0x40

◆ S3TB8

#define S3TB8 0x08

◆ S3TI

#define S3TI 0x02

◆ S4BUF_ADDRESS

#define S4BUF_ADDRESS 0x85U

◆ S4CON_ADDRESS

#define S4CON_ADDRESS 0x84U

◆ S4RB8

#define S4RB8 0x04

◆ S4REN

#define S4REN 0x10

◆ S4RI

#define S4RI 0x01

◆ S4SM0

#define S4SM0 0x80

◆ S4SM2

#define S4SM2 0x20

◆ S4ST4

#define S4ST4 0x40

◆ S4TB8

#define S4TB8 0x08

◆ S4TI

#define S4TI 0x02

◆ SADDR_ADDRESS

#define SADDR_ADDRESS 0xA9U

◆ SADEN_ADDRESS

#define SADEN_ADDRESS 0xB9U

◆ SBUF_ADDRESS

#define SBUF_ADDRESS 0x99U

◆ SCON_ADDRESS

#define SCON_ADDRESS 0x98U

◆ SLACKI

#define SLACKI 0x02

◆ SLACKO

#define SLACKO 0x01

◆ SLBUSY

#define SLBUSY 0x80

◆ SLRST

#define SLRST 0x01

◆ SPCTL_ADDRESS

#define SPCTL_ADDRESS 0xCEU

◆ SPDAT_ADDRESS

#define SPDAT_ADDRESS 0xCFU

◆ SPEN

#define SPEN 0x40

◆ SPIF

#define SPIF 0x80

◆ SPSTAT_ADDRESS

#define SPSTAT_ADDRESS 0xCDU

◆ SSIG

#define SSIG 0x80

◆ STAIF

#define STAIF 0x40

◆ STOIF

#define STOIF 0x08

◆ SUBCLK

#define SUBCLK

◆ SWBS

#define SWBS 0x40

◆ SWRST

#define SWRST 0x20

◆ SYSCLK

#define SYSCLK (* (SYSCLK_TypeDef xdata *) SYSCLK_BASE)

◆ SYSCLK_BASE

#define SYSCLK_BASE 0xFE00U

◆ T0_CT

#define T0_CT 0x04

◆ T0_GATE

#define T0_GATE 0x08

◆ T0_M0

#define T0_M0 0x01

◆ T0_M1

#define T0_M1 0x02

◆ T0H_ADDRESS

#define T0H_ADDRESS 0x8CU

◆ T0L_ADDRESS

#define T0L_ADDRESS 0x8AU

◆ T1_CT

#define T1_CT 0x40

◆ T1_GATE

#define T1_GATE 0x80

◆ T1_M0

#define T1_M0 0x10

◆ T1_M1

#define T1_M1 0x20

◆ T1H_ADDRESS

#define T1H_ADDRESS 0x8DU

◆ T1L_ADDRESS

#define T1L_ADDRESS 0x8BU

◆ T2H_ADDRESS

#define T2H_ADDRESS 0xD6U

◆ T2L_ADDRESS

#define T2L_ADDRESS 0xD7U

◆ T3_CT

#define T3_CT 0x04

◆ T3CLKO

#define T3CLKO 0x01

◆ T3H_ADDRESS

#define T3H_ADDRESS 0xD4U

◆ T3L_ADDRESS

#define T3L_ADDRESS 0xD5U

◆ T3R

#define T3R 0x08

◆ T3x12

#define T3x12 0x02

◆ T4_CT

#define T4_CT 0x40

◆ T4CLKO

#define T4CLKO 0x10

◆ T4H_ADDRESS

#define T4H_ADDRESS 0xD2U

◆ T4L_ADDRESS

#define T4L_ADDRESS 0xD3U

◆ T4R

#define T4R 0x80

◆ T4T3M_ADDRESS

#define T4T3M_ADDRESS 0xD1U

◆ T4x12

#define T4x12 0x20

◆ TADCP

#define TADCP (*(__IO uint8_t xdata *) TADCP_ADDRESS)

◆ TADCP_ADDRESS

#define TADCP_ADDRESS (PWMCKS_ADDRESS + 0x01U)

◆ TADCPH

#define TADCPH (*(__IO uint8_t xdata *) TADCPH_ADDRESS)

◆ TADCPH_ADDRESS

#define TADCPH_ADDRESS (TADCP_ADDRESS + 0x00U)

◆ TADCPL

#define TADCPL (*(__IO uint8_t xdata *) TADCPL_ADDRESS)

◆ TADCPL_ADDRESS

#define TADCPL_ADDRESS (PWMCL_ADDRESS + 0x01U)

◆ TCON_ADDRESS

#define TCON_ADDRESS 0x88U

◆ TM2PS

#define TM2PS (*(__IO uint8_t xdata *)TM2PS_ADDRESS)

◆ TM2PS_ADDRESS

#define TM2PS_ADDRESS 0xFEA2U

◆ TM3PS

#define TM3PS (*(__IO uint8_t xdata *)TM3PS_ADDRESS)

◆ TM3PS_ADDRESS

#define TM3PS_ADDRESS 0xFEA3U

◆ TM4PS

#define TM4PS (*(__IO uint8_t xdata *)TM4PS_ADDRESS)

◆ TM4PS_ADDRESS

#define TM4PS_ADDRESS 0xFEA4U

◆ TMOD_ADDRESS

#define TMOD_ADDRESS 0x89U

◆ TXIF

#define TXIF 0x10

◆ TXING

#define TXING 0x04

◆ VOCTRL_ADDRESS

#define VOCTRL_ADDRESS 0xBBU

◆ WCOL

#define WCOL 0x40

◆ WDT_ADDRESS

#define WDT_ADDRESS 0xC1U

◆ WDT_FLAG

#define WDT_FLAG 0x80

◆ WKTCH_ADDRESS

#define WKTCH_ADDRESS 0xABU

◆ WKTCL_ADDRESS

#define WKTCL_ADDRESS 0xAAU

◆ WKTEN

#define WKTEN 0x80

◆ X32KCR

#define X32KCR ( *(__IO uint8_t xdata *) X32KCR_ADDRESS)

◆ X32KCR_ADDRESS

#define X32KCR_ADDRESS (SYSCLK_BASE + 0x0006U)

◆ XOSCCR

#define XOSCCR ( *(__IO uint8_t xdata *) XOSCCR_ADDRESS)

◆ XOSCCR_ADDRESS

#define XOSCCR_ADDRESS (SYSCLK_BASE + 0x0003U)

变量说明

◆ AC

sbit AC = PSW^6

◆ ACC

sfr ACC = 0xe0

◆ ADC_CONTR

sfr ADC_CONTR = ADC_CONTR_ADDRESS

◆ ADC_RES

sfr ADC_RES = ADC_RESH_ADDRESS

◆ ADC_RESL

sfr ADC_RESL = ADC_RESL_ADDRESS

◆ ADCCFG

sfr ADCCFG = ADCCFG_ADDRESS

◆ AUXINTIF

sfr AUXINTIF = AUXINTIF_ADDRESS

◆ AUXR

sfr AUXR = AUXR_ADDRESS

◆ AUXR2

sfr AUXR2 = AUXR2_ADDRESS

◆ B

sfr B = 0xf0

◆ BUS_SPEED

sfr BUS_SPEED = BUS_SPEED_ADDRESS

◆ CMPCR1

sfr CMPCR1 = CMPCR1_ADDRESS

◆ CMPCR2

sfr CMPCR2 = CMPCR2_ADDRESS

◆ CY

sbit CY = PSW^7

◆ DPH

sfr DPH = 0x83

◆ DPH1

sfr DPH1 = 0xe5

◆ DPL

sfr DPL = 0x82

◆ DPL1

sfr DPL1 = 0xe4

◆ DPS

sfr DPS = 0xe3

◆ EA

sbit EA = IE^7

◆ EADC

sbit EADC = IE^5

◆ ELVD

sbit ELVD = IE^6

◆ ES

sbit ES = IE^4

◆ ET0

sbit ET0 = IE^1

◆ ET1

sbit ET1 = IE^3

◆ EX0

sbit EX0 = IE^0

◆ EX1

sbit EX1 = IE^2

◆ F0

sbit F0 = PSW^5

◆ F1

sbit F1 = PSW^1

◆ IAP_ADDRH

sfr IAP_ADDRH = IAP_ADDRH_ADDRESS

◆ IAP_ADDRL

sfr IAP_ADDRL = IAP_ADDRL_ADDRESS

◆ IAP_CMD

sfr IAP_CMD = IAP_CMD_ADDRESS

◆ IAP_CONTR

sfr IAP_CONTR = IAP_CONTR_ADDRESS

◆ IAP_DATA

sfr IAP_DATA = IAP_DATA_ADDRESS

◆ IAP_TPS

sfr IAP_TPS = IAP_TPS_ADDRESS

◆ IAP_TRIG

sfr IAP_TRIG = IAP_TRIG_ADDRESS

◆ IE

sfr IE = IE_ADDRESS

◆ IE0

sbit IE0 = TCON^1

◆ IE1

sbit IE1 = TCON^3

◆ IE2

sfr IE2 = IE2_ADDRESS

◆ INTCLKO

sfr INTCLKO = INTCLKO_ADDRESS

◆ IP

sfr IP = IP_ADDRESS

◆ IP2

sfr IP2 = IP2H_ADDRESS

◆ IP2H

sfr IP2H = IP2H_ADDRESS

◆ IP3

sfr IP3 = IP3_ADDRESS

◆ IP3H

sfr IP3H = IP3H_ADDRESS

◆ IPH

sfr IPH = IPH_ADDRESS

◆ IRCBAND

sfr IRCBAND = IRCBAND_ADDRESS

◆ IRTRIM

sfr IRTRIM = IRTRIM_ADDRESS

◆ ISP_ADDRH

sfr ISP_ADDRH = ISP_ADDRH_ADDRESS

◆ ISP_ADDRL

sfr ISP_ADDRL = ISP_ADDRL_ADDRESS

◆ ISP_CMD

sfr ISP_CMD = ISP_CMD_ADDRESS

◆ ISP_CONTR

sfr ISP_CONTR = ISP_CONTR_ADDRESS

◆ ISP_DATA

sfr ISP_DATA = ISP_DATA_ADDRESS

◆ ISP_TRIG

sfr ISP_TRIG = ISP_TRIG_ADDRESS

◆ IT0

sbit IT0 = TCON^0

◆ IT1

sbit IT1 = TCON^2

◆ LIRTRIM

sfr LIRTRIM = LIRTRIM_ADDRESS

◆ OV

sbit OV = PSW^2

◆ P

sbit P = PSW^0

◆ P0

sfr P0 = P0_ADDRESS

◆ P00

sbit P00 = P0^0

◆ P01

sbit P01 = P0^1

◆ P02

sbit P02 = P0^2

◆ P03

sbit P03 = P0^3

◆ P04

sbit P04 = P0^4

◆ P05

sbit P05 = P0^5

◆ P06

sbit P06 = P0^6

◆ P07

sbit P07 = P0^7

◆ P0M0

sfr P0M0 = P0M0_ADDRESS

◆ P0M1

sfr P0M1 = P0M1_ADDRESS

◆ P1

sfr P1 = P1_ADDRESS

◆ P10

sbit P10 = P1^0

◆ P11

sbit P11 = P1^1

◆ P12

sbit P12 = P1^2

◆ P13

sbit P13 = P1^3

◆ P14

sbit P14 = P1^4

◆ P15

sbit P15 = P1^5

◆ P16

sbit P16 = P1^6

◆ P17

sbit P17 = P1^7

◆ P1M0

sfr P1M0 = P1M0_ADDRESS

◆ P1M1

sfr P1M1 = P1M1_ADDRESS

◆ P2

sfr P2 = P2_ADDRESS

◆ P20

sbit P20 = P2^0

◆ P21

sbit P21 = P2^1

◆ P22

sbit P22 = P2^2

◆ P23

sbit P23 = P2^3

◆ P24

sbit P24 = P2^4

◆ P25

sbit P25 = P2^5

◆ P26

sbit P26 = P2^6

◆ P27

sbit P27 = P2^7

◆ P2M0

sfr P2M0 = P2M0_ADDRESS

◆ P2M1

sfr P2M1 = P2M1_ADDRESS

◆ P3

sfr P3 = P3_ADDRESS

◆ P30

sbit P30 = P3^0

◆ P31

sbit P31 = P3^1

◆ P32

sbit P32 = P3^2

◆ P33

sbit P33 = P3^3

◆ P34

sbit P34 = P3^4

◆ P35

sbit P35 = P3^5

◆ P36

sbit P36 = P3^6

◆ P37

sbit P37 = P3^7

◆ P3M0

sfr P3M0 = P3M0_ADDRESS

◆ P3M1

sfr P3M1 = P3M1_ADDRESS

◆ P4

sfr P4 = P4_ADDRESS

◆ P40

sbit P40 = P4^0

◆ P41

sbit P41 = P4^1

◆ P42

sbit P42 = P4^2

◆ P43

sbit P43 = P4^3

◆ P44

sbit P44 = P4^4

◆ P4M0

sfr P4M0 = P4M0_ADDRESS

◆ P4M1

sfr P4M1 = P4M1_ADDRESS

◆ P5

sfr P5 = P5_ADDRESS

◆ P50

sbit P50 = P5^0

◆ P51

sbit P51 = P5^1

◆ P52

sbit P52 = P5^2

◆ P53

sbit P53 = P5^3

◆ P54

sbit P54 = P5^4

◆ P55

sbit P55 = P5^5

◆ P56

sbit P56 = P5^6

◆ P57

sbit P57 = P5^7

◆ P5M0

sfr P5M0 = P5M0_ADDRESS

◆ P5M1

sfr P5M1 = P5M1_ADDRESS

◆ P6

sfr P6 = P6_ADDRESS

◆ P60

sbit P60 = P6^0

◆ P61

sbit P61 = P6^1

◆ P62

sbit P62 = P6^2

◆ P63

sbit P63 = P6^3

◆ P64

sbit P64 = P6^4

◆ P65

sbit P65 = P6^5

◆ P66

sbit P66 = P6^6

◆ P67

sbit P67 = P6^7

◆ P6M0

sfr P6M0 = P6M0_ADDRESS

◆ P6M1

sfr P6M1 = P6M1_ADDRESS

◆ P7

sfr P7 = P7_ADDRESS

◆ P70

sbit P70 = P7^0

◆ P71

sbit P71 = P7^1

◆ P72

sbit P72 = P7^2

◆ P73

sbit P73 = P7^3

◆ P74

sbit P74 = P7^4

◆ P75

sbit P75 = P7^5

◆ P76

sbit P76 = P7^6

◆ P77

sbit P77 = P7^7

◆ P7M0

sfr P7M0 = P7M0_ADDRESS

◆ P7M1

sfr P7M1 = P7M1_ADDRESS

◆ P_SW1

sfr P_SW1 = PER_SW1_ADDRESS

◆ P_SW2

sfr P_SW2 = PER_SW2_ADDRESS

◆ PADC

sbit PADC = IP^5

◆ PCON

sfr PCON = PCON_ADDRESS

◆ PLVD

sbit PLVD = IP^6

◆ PPCA

sbit PPCA = IP^7

◆ PS

sbit PS = IP^4

◆ PSW

sfr PSW = 0xd0

◆ PT0

sbit PT0 = IP^1

◆ PT1

sbit PT1 = IP^3

◆ PWMCFG

sfr PWMCFG = PWMCFG_ADDRESS

◆ PWMCR

sfr PWMCR = PWMCR_ADDRESS

◆ PWMFDCR

sfr PWMFDCR = PWMFDCR_ADDRESS

◆ PWMIF

sfr PWMIF = PWMIF_ADDRESS

◆ PX0

sbit PX0 = IP^0

◆ PX1

sbit PX1 = IP^2

◆ RB8

sbit RB8 = SCON^2

◆ REN

sbit REN = SCON^4

◆ RI

sbit RI = SCON^0

◆ RS0

sbit RS0 = PSW^3

◆ RS1

sbit RS1 = PSW^4

◆ RSTCFG

sfr RSTCFG = RSTCFG_ADDRESS

◆ S2BUF

sfr S2BUF = S2BUF_ADDRESS

◆ S2CON

sfr S2CON = S2CON_ADDRESS

◆ S3BUF

sfr S3BUF = S3BUF_ADDRESS

◆ S3CON

sfr S3CON = S3CON_ADDRESS

◆ S4BUF

sfr S4BUF = S4BUF_ADDRESS

◆ S4CON

sfr S4CON = S4CON_ADDRESS

◆ SADDR

sfr SADDR = SADDR_ADDRESS

◆ SADEN

sfr SADEN = SADEN_ADDRESS

◆ SBUF

sfr SBUF = SBUF_ADDRESS

◆ SCON

sfr SCON = SCON_ADDRESS

◆ SM0

sbit SM0 = SCON^7

◆ SM1

sbit SM1 = SCON^6

◆ SM2

sbit SM2 = SCON^5

◆ SP

sfr SP = 0x81

◆ SPCTL

sfr SPCTL = SPCTL_ADDRESS

◆ SPDAT

sfr SPDAT = SPDAT_ADDRESS

◆ SPSTAT

sfr SPSTAT = SPSTAT_ADDRESS

◆ T0H

sfr T0H = T0H_ADDRESS

◆ T0L

sfr T0L = T0L_ADDRESS

◆ T1H

sfr T1H = T1H_ADDRESS

◆ T1L

sfr T1L = T1L_ADDRESS

◆ T2H

sfr T2H = T2H_ADDRESS

◆ T2L

sfr T2L = T2L_ADDRESS

◆ T3H

sfr T3H = T3H_ADDRESS

◆ T3L

sfr T3L = T3L_ADDRESS

◆ T4H

sfr T4H = T4H_ADDRESS

◆ T4L

sfr T4L = T4L_ADDRESS

◆ T4T3M

sfr T4T3M = T4T3M_ADDRESS

◆ TA

sfr TA = 0xae

◆ TB8

sbit TB8 = SCON^3

◆ TCON

sfr TCON = TCON_ADDRESS

◆ TF0

sbit TF0 = TCON^5

◆ TF1

sbit TF1 = TCON^7

◆ TH0

sfr TH0 = T0H_ADDRESS

◆ TH1

sfr TH1 = T1H_ADDRESS

◆ TI

sbit TI = SCON^1

◆ TL0

sfr TL0 = T0L_ADDRESS

◆ TL1

sfr TL1 = T1L_ADDRESS

◆ TMOD

sfr TMOD = TMOD_ADDRESS

◆ TR0

sbit TR0 = TCON^4

◆ TR1

sbit TR1 = TCON^6

◆ VOCTRL

sfr VOCTRL = VOCTRL_ADDRESS

◆ WDT_CONTR

sfr WDT_CONTR = WDT_ADDRESS

◆ WKTCH

sfr WKTCH = WKTCH_ADDRESS

◆ WKTCL

sfr WKTCL = WKTCL_ADDRESS

结构体

宏定义

变量